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3163 Commits

Author SHA1 Message Date
Chris Lattner
07f7cc3ddb convert a massive if statement to a switch. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48240 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-11 19:28:17 +00:00
Chris Lattner
fce84acbbc start handling the 'f' x87 constraint. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48239 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-11 19:06:29 +00:00
Christopher Lamb
1bc1008b38 Missed part of recommit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48224 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-11 10:27:36 +00:00
Christopher Lamb
1fab4a6bbb Recommitting parts of r48130. These do not appear to cause the observed failures. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48223 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-11 10:09:17 +00:00
Evan Cheng
204496d58e In 32-bit mode, mark 64-bit GPR's as unallocatable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48217 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-11 07:16:00 +00:00
Nick Lewycky
3c78697a3c Fix the build on gcc 4.2. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48212 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-11 05:56:09 +00:00
Chris Lattner
447ff68c08 Change the model for FP Stack return to use fp operands on the 
RET instruction instead of using FpSET_ST0_32.  This also generalizes
the code to handling returning of multiple FP results.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48209 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-11 03:23:40 +00:00
Chris Lattner
183275a627 abort with an assert instead of a cerr to get line# 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48199 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-10 23:56:08 +00:00
Chris Lattner
03fdec04d1 Don't emit FP_REG_KILL into a block that just returns. Nothing 
can be live out of the block anyway, so it isn't needed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48192 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-10 23:34:12 +00:00
Chris Lattner
8e6da15e54 Eliminate the FP_GET_ST0/FP_SET_ST0 target-specific dag nodes, just lower to 
copyfromreg/copytoreg instead.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48174 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-10 21:08:41 +00:00
Evan Cheng
d2cde68855 Default ISD::PREFETCH to expand. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48169 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-10 19:38:10 +00:00
Evan Cheng
4499e495ea Revert 48125, 48126, and 48130 for now to unbreak some x86-64 tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48167 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-10 19:31:26 +00:00
Scott Michel
5b8f82e35b Give TargetLowering::getSetCCResultType() a parameter so that ISD::SETCC's 
return ValueType can depend its operands' ValueType.

This is a cosmetic change, no functionality impacted.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48145 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-10 15:42:14 +00:00
Christopher Lamb
3feb0170a8 Allow insert_subreg into implicit, target-specific values. 
Change insert/extract subreg instructions to be able to be used in TableGen patterns.
Use the above features to reimplement an x86-64 pseudo instruction as a pattern.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48130 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-10 06:12:08 +00:00
Dale Johannesen
b8cafe3427 Increase ISD::ParamFlags to 64 bits. Increase the ByValSize 
field to 32 bits, thus enabling correct handling of ByVal
structs bigger than 0x1ffff.  Abstract interface a bit.
Fixes gcc.c-torture/execute/pr23135.c and 
gcc.c-torture/execute/pr28982b.c in gcc testsuite (were ICE'ing
on ppc32, quietly producing wrong code on x86-32.)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48122 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-10 02:17:22 +00:00
Chris Lattner
f30e1cf9b7 teach X86InstrInfo::copyRegToReg how to copy into ST(0) from 
an RFP register class.

Teach ScheduleDAG how to handle CopyToReg with different src/dst 
reg classes.

This allows us to compile trivial inline asms that expect stuff
on the top of x87-fp stack.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48107 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-09 09:15:31 +00:00
Chris Lattner
5c927500c8 add some code to support cross-register class copying from 
RST -> RFP{32/64/80}.  We only handle ST(0) for now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48104 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-09 08:46:19 +00:00
Chris Lattner
90b347dc90 rearrange some code, no functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48101 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-09 07:58:04 +00:00
Chris Lattner
8dc023f684 claim ST(x) registers are 80 bits, which is true. This doesn't affect 
codegen yet because these can't be spilled (they don't exist until after RA).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48098 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-09 07:49:01 +00:00
Chris Lattner
afb23f48a4 rename FP_SETRESULT -> FP_SET_ST0 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48094 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-09 07:08:44 +00:00
Chris Lattner
6fa2f9c636 rename FpGETRESULT32 -> FpGET_ST0_32 etc. Add support for 
isel'ing value preserving FP roundings from one fp stack reg to another
into a noop, instead of stack traffic.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48093 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-09 07:05:32 +00:00
Chris Lattner
67f453aae7 Finish implementing a readme entry: when inserting an i64 variable 
into a vector of zeros or undef, and when the top part is obviously
zero, we can just use movd + shuffle.  This allows us to compile
vec_set-B.ll into:

_test3:
	movl	$1234567, %eax
	andl	4(%esp), %eax
	movd	%eax, %xmm0
	ret

instead of:

_test3:
	subl	$28, %esp
	movl	$1234567, %eax
	andl	32(%esp), %eax
	movl	%eax, (%esp)
	movl	$0, 4(%esp)
	movq	(%esp), %xmm0
	addl	$28, %esp
	ret



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48090 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-09 05:42:06 +00:00
Chris Lattner
f68cbceb17 add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48064 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-09 01:08:22 +00:00
Chris Lattner
62098040a1 Implement a readme entry, compiling 
#include <xmmintrin.h>
__m128i doload64(short x) {return _mm_set_epi16(0,0,0,0,0,0,0,1);}

into:
	movl	$1, %eax
	movd	%eax, %xmm0
	ret

instead of a constant pool load.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48063 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-09 01:05:04 +00:00
Chris Lattner
19f7969f81 1) Improve comments. 
2) Don't try to insert an i64 value into the low part of a 
   vector with movq on an x86-32 target.  This allows us to 
   compile:

__m128i doload64(short x) {return _mm_set_epi16(0,0,0,0,0,0,0,1);}

into:

_doload64:
	movaps	LCPI1_0, %xmm0
	ret

instead of:

_doload64:
	subl	$28, %esp
	movl	$0, 4(%esp)
	movl	$1, (%esp)
	movq	(%esp), %xmm0
	addl	$28, %esp
	ret


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48057 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-08 22:59:52 +00:00
Chris Lattner
c9517fb6eb minor simplifications to this code, don't create a dead 
SCALAR_TO_VECTOR on paths that end up not using it.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48056 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-08 22:48:29 +00:00
Chris Lattner
b607f9c822 This one looks easy, add a note. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48055 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-08 22:32:39 +00:00
Chris Lattner
f658ad10f6 move these to the appropriate file 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48054 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-08 22:28:45 +00:00
Evan Cheng
27b7db549e Implement x86 support for @llvm.prefetch. It corresponds to prefetcht{0|1|2} and prefetchnta instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48042 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-08 00:58:38 +00:00
Chris Lattner
d1108222fd mark frem as expand for all legal fp types on x86, regardless of whether 
we're using SSE or not.  This fixes PR2122.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48006 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-07 06:36:32 +00:00
Gabor Greif
2cf36e0772 some more spelling changes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47996 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-06 10:51:21 +00:00
Chris Lattner
4d93b2f16d evan implemented this. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47948 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-05 17:11:51 +00:00
Evan Cheng
e9083d669a isTwoAddress = 1 -> Constraints. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47941 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-05 08:19:16 +00:00
Evan Cheng
e7b8a8b713 PSLLWri etc. are two-address instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47940 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-05 08:11:27 +00:00
Chris Lattner
063d825208 add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47939 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-05 07:22:39 +00:00
Evan Cheng
b7664c6173 Ignore debugging related instructions if they get this far. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47934 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-05 02:34:36 +00:00
Evan Cheng
0b21390a86 Rather than asserting. Dump out the MI that we are not able to encode and abort. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47933 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-05 02:08:03 +00:00
Evan Cheng
6fd599fa69 Add a target lowering hook to control whether it's worthwhile to compress fp constant. 
For x86, if sse2 is available, it's not a good idea since cvtss2sd is slower than a movsd load and it prevents load folding. On x87, it's important to shrink fp constant since fldt is very expensive.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47931 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-05 01:30:59 +00:00
Andrew Lenharth
d19189e990 64bit CAS on 32bit x86. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47929 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-05 01:15:49 +00:00
Evan Cheng
6130f66eaa Refactor code. Remove duplicated functions that basically do the same thing as 
findRegisterUseOperandIdx, findRegisterDefOperandIndx. Fix some naming inconsistencies.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47927 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-05 00:59:57 +00:00
Andrew Lenharth
a76e2f0331 x86-64 atomics 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47903 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-04 21:13:33 +00:00
Evan Cheng
32967d2c7d 80 column violations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47878 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-04 03:20:06 +00:00
Evan Cheng
07b7ea1a48 Remove -always-fold-and-in-test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47871 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-04 00:40:35 +00:00
Dan Gohman
4c1fa61652 Add support for lowering i64 SRA_PARTS and friends on x86-64. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47865 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-03 22:22:09 +00:00
Devang Patel
41e2397b72 s/isReturnStruct()/hasStructRetAttr()/g 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47857 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-03 21:46:28 +00:00
Chris Lattner
767486b1d5 Evan implemented these. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47828 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-02 18:05:14 +00:00
Andrew Lenharth
fe0753efba good catch anton 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47800 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-01 23:18:21 +00:00
Andrew Lenharth
ce1105da43 make CAS work 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47799 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-01 22:27:48 +00:00
Andrew Lenharth
26ed8697d4 all but CAS working on x86 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47798 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-01 21:52:34 +00:00
Andrew Lenharth
ea7da50e5a Add lock prefix support to x86. Also add the instructions necessary for the atomic ops. They are still marked pseudo, since I cannot figure out what format to use, but they are the correct opcode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47795 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-01 13:37:02 +00:00