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1996 Commits

Author SHA1 Message Date
Nadav Rotem
b88e8dd31d Fix merge-typo and cleanup 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156541 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-10 12:50:02 +00:00
Nadav Rotem
b210651654 AVX2: Add an additional broadcast idiom. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156540 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-10 12:39:13 +00:00
Nadav Rotem
5fc2187a02 Generate AVX/AVX2 shuffles even when there is a memory op somewhere else in the program. 
Starting r155461 we are able to select patterns for vbroadcast even when the load op is used by other users.

Fix PR11900.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156539 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-10 12:22:05 +00:00
Chad Rosier
42726835e3 Fix a regression from r147481. This combine should only happen if there is a 
single use.
rdar://11360370


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156316 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-07 18:47:44 +00:00
Manman Ren
ed57984483 X86: optimization for -(x != 0) 
This patch will optimize -(x != 0) on X86
FROM 
cmpl	$0x01,%edi
sbbl	%eax,%eax
notl	%eax
TO
negl %edi
sbbl %eax %eax

In order to generate negl, I added patterns in Target/X86/X86InstrCompiler.td:
def : Pat<(X86sub_flag 0, GR32:$src), (NEG32r GR32:$src)>;

rdar: 10961709


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156312 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-07 18:06:23 +00:00
Craig Topper
d978c54e60 Use MVT instead of EVT as the argument to all the shuffle decode functions. Simplify some of the decode functions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156268 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-06 19:46:21 +00:00
Craig Topper
bdcbcb3ae7 Add VPERMQ/VPERMPD to the list of target specific shuffles that can be looked through for DAG combine purposes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156266 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-06 18:54:26 +00:00
Benjamin Kramer
aaf723dd2b Add a new target hook "predictableSelectIsExpensive". 
This will be used to determine whether it's profitable to turn a select into a
branch when the branch is likely to be predicted.

Currently enabled for everything but Atom on X86 and Cortex-A9 devices on ARM.

I'm not entirely happy with the name of this flag, suggestions welcome ;)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156233 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-05 12:49:14 +00:00
Craig Topper
31a207a3b7 Fix some loops to match coding standards. No functional change intended. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156159 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-04 06:39:13 +00:00
Craig Topper
6643d9c180 Fix up some spacing. No functional change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156158 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-04 06:18:33 +00:00
Craig Topper
5da8a80377 Simplify broadcast lowering code. No functional change intended. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156157 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-04 05:49:51 +00:00
Craig Topper
f3640d7ec1 Allow v16i16 and v32i8 shuffles to be rewritten as narrower shuffles. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156156 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-04 04:44:49 +00:00
Craig Topper
11ac1f81a8 Simplify shuffle narrowing code a bit. No functional change intended. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156154 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-04 04:08:44 +00:00
Craig Topper
b607264550 Use 'unsigned' instead of 'int' in a few places dealing with counts of vector elements. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156060 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-03 07:26:59 +00:00
Craig Topper
6b28d356c5 Fix 256-bit vpshuflw and vpshufhw immediate encoding to handle undefs in the lower half correctly. Missed in r155982. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156059 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-03 07:12:59 +00:00
Preston Gurd
c0f0a93936 For Intel Atom, use ILP scheduling always, instead of ILP for 64 bit 
and Hybrid for 32 bit, since benchmarks show ILP scheduling is better
most of the time.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156028 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-02 22:02:02 +00:00
Manman Ren
e2849851b2 Revert r155853 
The commit is intended to fix rdar://10961709.
But it is the root cause of PR12720.
Revert it for now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155992 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-02 15:24:32 +00:00
Craig Topper
a9a568a79d Add support for selecting AVX2 vpshuflw and vpshufhw. Add decoding support for AsmPrinter. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155982 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-02 08:03:44 +00:00
Manman Ren
769ea2f93f X86: optimization for max-like struct 
This patch will optimize the following cases on X86
(a > b) ? (a-b) : 0
(a >= b) ? (a-b) : 0
(b < a) ? (a-b) : 0
(b <= a) ? (a-b) : 0

FROM
movl    %edi, %ecx
subl    %esi, %ecx
cmpl    %edi, %esi
movl    $0, %eax
cmovll  %ecx, %eax
TO
xorl    %eax, %eax
subl    %esi, %edi
cmovll  %eax, %edi
movl    %edi, %eax

rdar: 10734411


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155919 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-01 17:16:15 +00:00
Manman Ren
16a76519a5 X86: optimization for -(x != 0) 
This patch will optimize -(x != 0) on X86
FROM 
cmpl	$0x01,%edi
sbbl	%eax,%eax
notl	%eax
TO
negl %edi
sbbl %eax %eax


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155853 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-30 22:51:25 +00:00
Chad Rosier
238ae31aa3 Tidy up. No functional change intended. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155832 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-30 17:47:15 +00:00
Craig Topper
7d1e3dcf71 No need to normalize index before calling Extract128BitVector 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155811 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-30 05:17:10 +00:00
Jakub Staszak
6610b1db55 Remove unneeded casts. No functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155800 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-29 20:52:53 +00:00
Craig Topper
d77d2feb7a Simplify code a bit. No functional change intended. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155798 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-29 20:22:05 +00:00
Craig Topper
66ddd153f6 Use 'unsigned' instead of 'int' in several places when retrieving number of vector elements. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155742 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-27 22:54:43 +00:00
Chad Rosier
a73b6fc511 Add x86-specific DAG combine to simplify: 
x == -y --> x+y == 0
 x != -y --> x+y != 0

On x86, the generated code goes from
   negl    %esi
   cmpl    %esi, %edi
   je    .LBB0_2
to
   addl    %esi, %edi
   je    .L4

This case is correctly handled for ARM with "cmn".

Patch by Manman Ren.
rdar://11245199
PR12545


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155739 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-27 22:33:25 +00:00
Craig Topper
b4a8aef96d Tidy up spacing. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155733 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-27 21:05:09 +00:00
Benjamin Kramer
17c836c4b5 X86: Don't emit conditional floating point moves on when targeting pre-pentiumpro architectures. 
* Model FPSW (the FPU status word) as a register.
* Add ISel patterns for the FUCOM*, FNSTSW and SAHF instructions.
* During Legalize/Lowering, build a node sequence to transfer the comparison
result from FPSW into EFLAGS. If you're wondering about the right-shift: That's
an implicit sub-register extraction (%ax -> %ah) which is handled later on by
the instruction selector.

Fixes PR6679. Patch by Christoph Erhardt!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155704 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-27 12:07:43 +00:00
Craig Topper
c16f851569 Use vector_shuffles instead of target specific unpack nodes for AVX ZERO_EXTEND/ANY_EXTEND combine. These will be converted to target specific nodes during lowering. This is more consistent with other code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155537 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-25 06:39:39 +00:00
Nadav Rotem
87ffdbcb7b AVX2: The BLENDPW instruction selects between vectors of v16i16 using an i8 
immediate. We can't use it here because the shuffle code does not check that
the lower part of the word is identical to the upper part.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155440 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-24 11:27:53 +00:00
Craig Topper
3ef43cf3a2 Remove dangling spaces. Fix some other formatting. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155429 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-24 06:36:35 +00:00
Craig Topper
7fd5e16d3b Simplify code a bit and make it compile better. Remove unused parameters. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155428 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-24 06:02:29 +00:00
Nadav Rotem
a35407705d Optimize the vector UINT_TO_FP, SINT_TO_FP and FP_TO_SINT operations where the integer type is i8 (commonly used in graphics). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155397 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-23 21:53:37 +00:00
Craig Topper
708e44fc96 Use MVT instead of EVT through all of LowerVECTOR_SHUFFLEtoBlend and not just the switch. Saves a little bit of binary size. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155339 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-23 07:36:33 +00:00
Craig Topper
9d35240eee Make getZeroVector and getOnesVector more alike as far as how they detect 128-bit versus 256-bit vectors. Be explicit about both sizes and use llvm_unreachable. Similar changes to getLegalSplat. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155337 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-23 07:24:41 +00:00
Craig Topper
69947b9cea Tidy up by removing some 'else' after 'return' 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155336 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-23 06:57:04 +00:00
Craig Topper
1842ba0dfc Tidy up spacing in LowerVECTOR_SHUFFLEtoBlend. Remove code that checks if shuffle operand has a different type than the the shuffle result since it can never happen. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155333 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-23 06:38:28 +00:00
Craig Topper
731dfd0da9 Add a couple llvm_unreachables. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155332 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-23 03:42:40 +00:00
Craig Topper
0fbf364fd7 Remove some tab characers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155331 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-23 03:28:34 +00:00
Craig Topper
e8eb116ff3 Remove some 'else' after 'return'. No functional change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155330 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-23 03:26:18 +00:00
Craig Topper
b14940a047 Make Extract128BitVector and Insert128BitVector take an unsigned instead of an ConstantNode SDValue. getConstant was almost always called just before only to have the functions take it apart and build a new ConstantSDNode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155325 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-22 20:55:18 +00:00
Craig Topper
767b4f64a0 Convert getNode(UNDEF) to getUNDEF. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155321 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-22 19:29:34 +00:00
Craig Topper
df966f6bee Make calls to getVectorShuffle more consistent. Use shuffle VT for calls to getUNDEF instead of requerying. Use &Mask[0] instead of Mask.data(). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155320 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-22 19:17:57 +00:00
Craig Topper
d63fa657e4 Tidy up. 80 columns and argument alignment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155319 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-22 18:51:37 +00:00
Craig Topper
4c7972d638 Simplify code by converting multiple places that were manually concatenating 128-bit vectors to use either CONCAT_VECTORS or a helper function. CONCAT_VECTORS will itself be lowered to the same pattern as before. The helper function is needed for concats of BUILD_VECTORs since getNode(CONCAT_VECTORS) will just return a large BUILD_VECTOR and we may be trying to lower large BUILD_VECTORS when this occurs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155318 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-22 18:15:59 +00:00
Elena Demikhovsky
1da5867236 ZERO_EXTEND/SIGN_EXTEND/TRUNCATE optimization for AVX2 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155309 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-22 09:39:03 +00:00
Craig Topper
9e401f22ec Make some fixed arrays const. Use array_lengthof in a couple places instead of a hardcoded number. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155294 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-21 18:58:38 +00:00
Craig Topper
d0cf565e79 Tidy up. 80 columns and some other spacing issues. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155291 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-21 18:13:35 +00:00
Craig Topper
c909950c38 Convert some uses of XXXRegisterClass to &XXXRegClass. No functional change since they are equivalent. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155186 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-20 06:31:50 +00:00
Craig Topper
a963c81819 Remove AVX vpermil intrinsics. I removed their uses from clang headers and builtins a while back. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154985 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-18 05:24:00 +00:00