Vincent Lejeune
70a7d5ddb4
R600: Use function inputs to represent data stored in gpr
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194425 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-11 22:10:24 +00:00
Tom Stellard
9c598cfebc
R600: Fix handling of NAN in comparison instructions
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We were completely ignoring the unorder/ordered attributes of condition
codes and also incorrectly lowering seto and setuo.
Reviewed-by: Vincent Lejeune<vljn at ovi.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191603 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-28 02:50:50 +00:00
Vincent Lejeune
512119770e
R600: Schedule copy from phys register at beginning of block
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It allows regalloc pass to remove them by trivially assigning associated reg
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183336 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-05 20:27:35 +00:00
Vincent Lejeune
96fe0be43b
R600: use capital letter for PV channel
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183107 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-03 15:44:35 +00:00
Vincent Lejeune
76fc2d077f
R600: Use bottom up scheduling algorithm
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182129 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-17 16:50:56 +00:00
Vincent Lejeune
92f24d403f
R600: Prettier asmPrint of Alu
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180956 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-02 21:52:30 +00:00
Tom Stellard
f98f2ce29e
Add R600 backend
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A new backend supporting AMD GPUs: Radeon HD2XXX - HD7XXX
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169915 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-11 21:25:42 +00:00
