6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-08-08 19:25:47 +00:00
Code Issues Projects Releases Wiki Activity
90,070 Commits 39 Branches 0 Tags
14809fd5261356365de670ef7ddf9103bb0ae6ba
Commit Graph

24076 Commits

Author SHA1 Message Date
Akira Hatanaka
aa49f35240 [mips] Remove unused option. Fix 80-column violations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176330 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-03-01 02:17:02 +00:00
Akira Hatanaka
1f0aca857b [mips] Add the capability to search delay slot filling instructions in 
successor basic blocks.

Currently this is off by default.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176329 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-03-01 02:03:51 +00:00
Akira Hatanaka
888e8fefd2 [mips] Do not add SecondLastInst to list BranchInstrs if there is only one 
terminator.

No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176326 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-03-01 01:22:26 +00:00
Akira Hatanaka
d0a4b60df1 [mips] Define an overloaded version of function MipsInstrInfo::AnalyzeBranchAdd. 
This function will be used later when the capability to search delay slot
filling instructions in successor blocks is added. No intended functionality
changes.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176325 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-03-01 01:10:17 +00:00
Akira Hatanaka
b8bc8cc3b0 [mips] Add options to disable searching backward and in successor blocks. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176321 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-03-01 01:02:36 +00:00
Akira Hatanaka
e760675b0e [mips] Add capability to search in the forward direction for instructions that 
can fill the delay slot.

Currently, this is off by default.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176320 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-03-01 00:50:52 +00:00
Akira Hatanaka
1f7330b162 [mips] Define helper function searchRange 
No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176318 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-03-01 00:26:14 +00:00
Akira Hatanaka
49d58723d2 [mips] Rename function findDelayInstr to searchBackward. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176317 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-03-01 00:20:16 +00:00
Akira Hatanaka
a56f411961 [mips] Define class MemDefsUses. 
This class tracks dependence between memory instructions using underlying
objects of memory operands. 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176313 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-03-01 00:16:31 +00:00
Chad Rosier
a6ca703693 Tidy up; no functional change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176288 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-02-28 19:16:42 +00:00
Chad Rosier
279706e90e Style; no functional change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176285 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-02-28 18:54:27 +00:00
Yiannis Tsiouris
2d1035def1 Re-format comments (and check commit access) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176270 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-02-28 16:59:10 +00:00
Tim Northover
54a1cf75d2 AArch64: remove post-encoder method from FCMP (immediate) instructions. 
The work done by the post-encoder (setting architecturally unused bits to 0 as
required) can be done by the existing operand that covers the "#0.0". This
removes at least one use of the discouraged PostEncoderMethod uses.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176261 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-02-28 14:46:14 +00:00
Tim Northover
6ff20f205b AArch64: be more careful resorting to inefficient addressing for weak vars. 
If an otherwise weak var is actually defined in this unit, it can't be
undefined at runtime so we can use normal global variable sequences (ADRP/ADD)
to access it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176259 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-02-28 14:36:31 +00:00
Tim Northover
5366ab21f4 AArch64: don't drop GlobalAddress offset when handling extern_weak decls. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176258 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-02-28 14:36:24 +00:00
Tim Northover
279b9184c2 AArch64: Use cbnz instead of cmp/b.ne pair for atomic operations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176253 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-02-28 13:52:07 +00:00
Jim Grosbach
b302a4e6b5 ARM: FMA is legal only if VFP4 is available. 
rdar://13306723

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176212 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-02-27 21:31:12 +00:00
Chad Rosier
0a4da9c6a1 Remove this instance of dl as it's defined in a previous scope. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176208 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-02-27 20:34:14 +00:00
Tim Northover
d65dfd8342 ARM: permit full range of valid ADR immediates. 
This fixes an issue where trying to assemlbe valid ADR instructions would cause
LLVM to hit a failed assertion.

Patch by Keith Walker.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176189 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-02-27 16:43:09 +00:00
Nadav Rotem
f8b80de1a9 Revert r176166 because it broke one of the lit tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176171 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-02-27 05:56:20 +00:00
Nadav Rotem
e7c52282dd std::string to StringRef. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176166 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-02-27 05:23:56 +00:00
Reed Kotler
c1a2caf870 Fix cut/paste error in a comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176165 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-02-27 04:20:14 +00:00
Reed Kotler
d056dc0aae Add the skeleton for the Mips constant island pass. 
It will only be used for Mips 16 at this time.
 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176161 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-02-27 03:33:58 +00:00
Bill Schmidt
6539682330 Fix PR15332 (patch by Florian Zeitz). 
There's no need to generate a stack frame for PPC32 SVR4 when there are
no local variables assigned to the stack, i.e., when no red zone is needed.
(PPC64 supports a red zone, but PPC32 does not.)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176124 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-02-26 21:28:57 +00:00
Christian Konig
3c980d1632 R600/SI: Add promotion of e32 to e64 in operand folding 
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176105 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-02-26 17:52:47 +00:00
Christian Konig
f767018b10 R600/SI: add VOP mapping functions 
Make it possible to map between e32 and e64 encoding opcodes.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176104 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-02-26 17:52:42 +00:00
Christian Konig
b37afdcf3f R600/SI: swap operands if it helps folding 
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176103 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-02-26 17:52:36 +00:00
Christian Konig
b3d1eaded7 R600/SI: add some more instruction flags 
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176102 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-02-26 17:52:29 +00:00
Christian Konig
d3b5509b80 R600/SI: add post ISel folding for SI v2 
Include immediate folding and SGPR limit handling for VOP3 instructions.

v2: remove leftover hasExtraSrcRegAllocReq

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176101 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-02-26 17:52:23 +00:00
Christian Konig
c018ecac2f R600/SI: add folding helper 
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176100 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-02-26 17:52:16 +00:00
Christian Konig
749428f852 R600/SI: fix VOP3b encoding v2 
v2: document why we hardcode VCC for now.

This is a candidate for the mesa-stable branch.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176099 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-02-26 17:52:09 +00:00
Christian Konig
6fd49bc89a R600/SI: fix and cleanup SI register definition v2 
Prevent producing real strange tablegen code by using
proper register sizes, alignments and hierarchy.

Also cleanup the unused definitions and add some comments.

v2: add SGPR 512 bit registers, stop registers from wrapping around,
    fix SGPR alignment

This is a candidate for the mesa-stable branch.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176098 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-02-26 17:52:03 +00:00
Christian Konig
a25b8d4c0b R600/SI: fix stupid typo 
This is a candidate for the mesa-stable branch.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176097 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-02-26 17:51:57 +00:00
Akira Hatanaka
70cdcd5114 [mips] Use class RegDefsUses to track register defs and uses. 
No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176070 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-02-26 01:30:05 +00:00
Chad Rosier
fe88aa0d14 [fast-isel] Make sure the FastLowerArguments function checks to make sure the 
arguments type is a simple type.
rdar://13290455

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176066 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-02-26 01:05:31 +00:00
Michael Liao
d09318f901 Refine fix to PR10499, no functionality change 
- Put expensive checking after simple one



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176060 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-02-25 23:16:36 +00:00
Michael Liao
5e6e15caa7 Fix PR10499 
- Check whether SSE is available before lowering all 1s vector building with
  PCMPEQD, which is only available from SSE2



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176058 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-02-25 23:01:03 +00:00
Chad Rosier
fd3417d288 [fast-isel] Add X86FastIsel::FastLowerArguments to handle functions with 6 or 
fewer scalar integer (i32 or i64) arguments. It completely eliminates the need
for SDISel for trivial functions.

Also, add the new llc -fast-isel-abort-args option, which is similar to
-fast-isel-abort option, but for formal argument lowering.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176052 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-02-25 21:59:35 +00:00
Chad Rosier
dca83187b7 [ms-inline asm] Add support for the pushad/popad mnemonics. 
rdar://13254235

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176036 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-02-25 19:06:27 +00:00
Bill Schmidt
fc7695a653 Fix missing relocation for TLS addressing peephole optimization. 
Report and fix due to Kai Nacke.  Testcase update by me.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176029 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-02-25 16:44:35 +00:00
Reed Kotler
de89ecd011 Make pseudos FEXT_CCRX16_ins and FEXT_CCRXI16_ins into custom emitters. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176007 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-02-25 02:25:47 +00:00
Reed Kotler
29cb2591f9 Make psuedo FEXT_T8I816_ins into a custom emitter. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176002 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-02-24 23:17:51 +00:00
Bill Schmidt
4edd84da1b Fix PR14364. 
This removes a const_cast hack from PPCRegisterInfo::hasReservedSpillSlot().
The proper place to save the frame index for the CR spill slot is in the
PPCFunctionInfo object, not the PPCRegisterInfo object.

No new test cases, as this just reimplements existing function.  Existing
tests such as test/CodeGen/PowerPC/crsave.ll are sufficient.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175998 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-02-24 17:34:50 +00:00
Francois Pichet
f4aa644dff Typo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175991 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-02-24 12:34:13 +00:00
Nadav Rotem
f8db4478f8 Revert r169638 because it broke Mesa llvmpipe tests. 
Fix PR15239.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175985 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-02-24 07:09:35 +00:00
Reed Kotler
459d35cb79 Make psuedo FEXT_T8I816_ins a custom inserter. It should be expanded 
as early as possible; which means during instruction selection.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175984 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-02-24 06:16:39 +00:00
Reed Kotler
e7c67492dd Add new base instruction def for cmpi, cmp, slt and sltu so that def/uses 
proper. Fixed this already a few days ago for slti.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175975 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-02-23 23:37:03 +00:00
Benjamin Kramer
36bd16ef0b X86: Disable cmov-memory patterns on subtargets without cmov. 
Fixes PR15115.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175962 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-02-23 10:40:58 +00:00
Reed Kotler
50354a3f4a Expand pseudos/macros for Selt. This is the last of the complex 
macros.The rest is some small misc. stuff.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175950 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-02-23 03:09:56 +00:00
Jim Grosbach
1e8ed2537b ARM: Convenience aliases for 'srs*' instructions. 
Handle an implied 'sp' operand.

rdar://11466783

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175940 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-02-23 00:52:09 +00:00