Commit Graph

3233 Commits

Author SHA1 Message Date
Daniel Sanders
16dc6ed33f [mips] Attempting to use register $32 should be an error instead of an assertion.
Reviewers: matheusalmeida

Reviewed By: matheusalmeida

Differential Revision: http://llvm-reviews.chandlerc.com/D3201

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204932 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-27 15:00:44 +00:00
Daniel Sanders
743cf74530 [mips] Add support for .cpsetup
Summary:
Patch by Robert N. M. Watson
His work was sponsored by: DARPA, AFRL

Small corrections by myself.

CC: theraven, matheusalmeida

Differential Revision: http://llvm-reviews.chandlerc.com/D3199

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204924 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-27 13:52:53 +00:00
Elena Demikhovsky
61785a0c3d AVX-512: Implemented masking for integer arithmetic & logic instructions.
By Robert Khasanov rob.khasanov@gmail.com


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204906 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-27 09:45:08 +00:00
Stepan Dyatkovskiy
fee5d23404 Rejected r204899 and r204900 due to remaining test failures on cmake-llvm-x86_64-linux buildbot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204901 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-27 08:38:18 +00:00
Stepan Dyatkovskiy
a36286cb49 Fixed test for r204899 (pr18931 fix)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204900 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-27 08:20:26 +00:00
Stepan Dyatkovskiy
fccc6901d6 Fix for pr18931: Crash using integrated assembler with immediate arithmetic
Fix description:
Expressions like 'cmp r0, #(l1 - l2) >> 3' could not be evaluated on asm parsing stage,
since it is impossible to resolve labels on this stage. In the end of stage we still have
expression (MCExpr).
Then, when we want to encode it, we expect it to be an immediate, but it still an expression.
Patch introduces a Fixup (MCFixup instance), that is processed after main encoding stage.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204899 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-27 07:49:39 +00:00
Jiangning Liu
09b4588309 ARM: raise error message when complex SO expressions can't really be
solved as a constant at compilation time.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204898 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-27 07:42:58 +00:00
Rafael Espindola
e459f72ee0 Correctly propagates st_size.
This also finally removes a bogus call to AliasedSymbol.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204883 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-27 00:28:24 +00:00
Kevin Enderby
9efa4ff901 Fix the ARM VST4 (single 4-element structure from one lane)
size 16 double-spaced registers instruction printing.

This:
	vld4.16 {d17[1], d19[1], d21[1], d23[1]}, [r7]!

was being printed as:

	vld4.16 {d17[1], d18[1], d19[1], d20[1]}, [r7]!

rdar://16435096


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204847 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-26 19:35:40 +00:00
Matheus Almeida
8e7aa4be58 [mips] Use TwoOperandAliasConstraint for ArithLogicR instructions.
This enables TableGen to generate an additional two operand matcher
for our ArithLogicR class of instructions (constituted by 3 register operands).
E.g.: and $1, $2 <=> and $1, $1, $2


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204826 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-26 16:09:43 +00:00
Matheus Almeida
75203b6d11 [mips] Add support to the '.dword' directive.
The '.dword' directive accepts a list of expressions and emits
them in 8-byte chunks in successive locations.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204822 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-26 15:44:18 +00:00
Matheus Almeida
5957d10b41 [mips] Add support to '.set mips64'.
The '.set mips64' directive enables the feature Mips:FeatureMips64
from assembly. Note that it doesn't modify the ELF header as opposed
to the use of -mips64 from the command-line. The reason for this
is that we want to be as compatible as possible with existing assemblers
like GAS.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204817 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-26 15:14:32 +00:00
Matheus Almeida
53ccc093bf [mips] Add support to '.set mips64r2'.
The '.set mips64r2' directive enables the feature Mips:FeatureMips64r2
from assembly. Note that it doesn't modify the ELF header as opposed
to the use of -mips64r2 from the command-line. The reason for this
is that we want to be as compatible as possible with existing assemblers
like GAS.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204815 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-26 14:52:22 +00:00
Matheus Almeida
0de31d52d5 [mips] Add support for '.option pic2'.
The directive '.option pic2' enables PIC from assembly source.
At the moment none of the macros/directives check the PIC bit
but that's going to be fixed relatively soon. For example, the
expansion of macros like 'la' depend on the relocation model.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204803 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-26 13:40:29 +00:00
Daniel Sanders
23f0634162 [mips] Add tests for t0-t3 for N32/N64
These are aliases of t4-t7 and are provided for compatibility with both the
original ABI documentation (using t4-t7) and GNU As (using t0-t3)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204797 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-26 11:46:34 +00:00
Daniel Sanders
968ea7b82c [mips] The register names depend on the ABI being N32/N64 rather than the arch being mips64
Summary: Added test cases for O32 and N32 on MIPS64.

Reviewers: matheusalmeida

Reviewed By: matheusalmeida

Differential Revision: http://llvm-reviews.chandlerc.com/D3175

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204796 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-26 11:39:07 +00:00
Daniel Sanders
95f4d65d4f [mips] $s8 is an alias for $fp in all ABI's, not just N32/N64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204793 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-26 11:05:24 +00:00
Daniel Sanders
d431e0a20a [mips] Move the CHECK lines in mips*-register-names.s to make it more obvious which CHECK matches with which insn
This reveals a small mistake in mips-register-names.s ($sp is tested twice and
$s8 is not tested) which will be fixed in a follow-up commit.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204792 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-26 10:54:30 +00:00
Rafael Espindola
3008f80562 Correctly detect if a symbol uses a reserved section index or not.
The logic was incorrect for variables, causing them to end up in the wrong
section if the section had an index >= 0xff00.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204771 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-26 00:16:43 +00:00
Rafael Espindola
81c66bcc13 Create .symtab_shndxr only when needed.
We need .symtab_shndxr if and only if a symbol references a section with an
index >= 0xff00.

The old code was trying to figure out if the section was needed ahead of time,
making it a fairly dependent on the code actually writing the table. It was
also somewhat conservative and would create the section in cases where it was
not needed.

If I remember correctly, the old structure was there so that the sections were
created in the same order gas creates them. That was valuable when MC's support
for ELF was new and we tested with elf-dump.py.

This patch refactors the symbol table creation to another class and makes it
obvious that .symtab_shndxr is really only created when we are about to output
a reference to a section index >= 0xff00.

While here, also improve the tests to use macros. One file is one section
short of needing .symtab_shndxr, the second one has just the right number.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204769 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-25 23:44:25 +00:00
Daniel Sanders
3527e5fcb3 [mips] '.set at=$0' should be equivalent to '.set noat'
Differential Revision: http://llvm-reviews.chandlerc.com/D3171

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204714 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-25 13:01:06 +00:00
Daniel Sanders
c7e1663c24 [mips] Correct testcase for .set at=$reg and emit the new warnings for numeric registers too.
Summary:
Remove the XFAIL added in my previous commit and correct the test such that
it correctly tests the expansion of the assembler temporary.

Also added a test to check that $at is always $1 when written by the
user.

Corrected the new assembler temporary warnings so that they are emitted for
numeric registers too.

Differential Revision: http://llvm-reviews.chandlerc.com/D3169

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204711 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-25 11:16:03 +00:00
Daniel Sanders
c141b331b9 [mips] Fix assembler temporary expansion and add associated warnings about the use of $at.
Summary:
The assembler temporary is normally $at ($1) but can be reassigned using
'.set at=$reg'. Regardless of which register is nominated as the assembler
temporary, $at remains $1 when written by the user.

Adds warnings under the following conditions:
* The register nominated as the assembler temporary is used by the user.
* '.set noat' is in effect and $at is used by the user.
Both of these only work for named registers. I have a follow up commit that makes it work for numeric registers as well.

XFAIL set-at-directive.s since it incorrectly tests that $at is redefined by
'.set at=$reg'. Testcases will follow in a separate commit.

Patch by David Chisnall
His work was sponsored by: DARPA, AFRL

Differential Revision: http://llvm-reviews.chandlerc.com/D3167

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204710 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-25 10:57:07 +00:00
Kevin Enderby
4a88cd08da Fix crashes when assembler directives are used that are not
for Mach-O object files by generating an error instead.

rdar://16335232


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204687 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-25 00:05:50 +00:00
Ulrich Weigand
47eac58333 [PowerPC] Generate little-endian object files
As a first step towards real little-endian code generation, this patch
changes the PowerPC MC layer to actually generate little-endian object
files.  This involves passing the little-endian flag through the various
layers, including down to createELFObjectWriter so we actually get basic
little-endian ELF objects, emitting instructions in little-endian order,
and handling fixups and relocations as appropriate for little-endian.

The bulk of the patch is to update most test cases in test/MC/PowerPC
to verify both big- and little-endian encodings.  (The only test cases
*not* updated are those that create actual big-endian ABI code, like
the TLS tests.)

Note that while the object files are now little-endian, the generated
code itself is not yet updated, in particular, it still does not adhere
to the ELFv2 ABI.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204634 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-24 18:16:09 +00:00
Daniel Sanders
8ce101ed10 [mips] Add error message when trying to use $at in '.set noat' mode.
Summary:
Patch by David Chisnall
His work was sponsored by: DARPA, AFRL

Differential Revision: http://llvm-reviews.chandlerc.com/D3158

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204621 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-24 16:48:01 +00:00
Daniel Sanders
75002071fd [mips] Add regression tests for parenthetic expressions in MIPS assembly.
Summary:
These expressions already worked but weren't tested.

Patch by Robert N. M. Watson and David Chisnall (it was originally two patches)
Their work was sponsored by: DARPA, AFRL

Differential Revision: http://llvm-reviews.chandlerc.com/D3156

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204612 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-24 15:42:21 +00:00
Daniel Sanders
eaae583095 [mips] Allow dsubu to take an immediate as an alias for dsubiu.
Summary:
Patch by David Chisnall
His work was sponsored by: DARPA, AFRL

Differential Revision: http://llvm-reviews.chandlerc.com/D3155

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204611 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-24 15:38:00 +00:00
Daniel Sanders
67db74e02c [mips] Implement shorthand add / sub forms for MIPS.
Summary:
- If only two registers are passed to a three-register operation, then the
  first argument is both source and destination register.

- If a non-register is passed as the last argument, generate the immediate
  version of the instruction.

Also mark DADD commutative and add scheduling information (to the generic
scheduler), and implement DSUB.

Patch by David Chisnall
His work was sponsored by: DARPA, AFRL

CC: theraven

Differential Revision: http://llvm-reviews.chandlerc.com/D3148

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204605 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-24 14:05:39 +00:00
Rafael Espindola
2236f9348d Teach llvm-readobj to print human friendly description of reserved sections.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204584 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-24 05:00:34 +00:00
Rafael Espindola
0259b8e14f Add back tests that were reverted in r204203.
They pass again with the fix in r204581.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204582 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-24 03:48:15 +00:00
Rafael Espindola
0bce3343cc Propagate section from base to derived symbol.
We were already propagating the section in

a = b

With this patch we also propagate it for

a = b + 1

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204581 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-24 03:43:21 +00:00
Rafael Espindola
4ff2dadebe Propagate types from symbol to aliases.
This is similar, but not identical to what gas does. The logic in MC is to just
compute the symbol table after parsing the entire file. GAS is mixed, given

.type b, @object
a = b
b:
.type b, @function

It will propagate the change and make 'a' a function. Given

.type b, @object
b:
a = b
.type b, @function

the type of 'a' is still object.

Since we do the computation in the end, we produce a function in both cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204555 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-23 03:33:20 +00:00
Saleem Abdulrasool
7afe0000f6 ARM IAS: properly handle function entries in .thumb
When a label is parsed, check if there is type information available for the
label.  If so, check if the symbol is a function.  If the symbol is a function
and we are in thumb mode and no explicit thumb_func has been emitted, adjust the
symbol data to indicate that the function definition is a thumb function.

The application of this inferencing is improved value handling in the object
file (the required thumb bit is set on symbols which are thumb functions).  It
also helps improve compatibility with binutils.

The one complication that arises from this handling is the MCAsmStreamer.  The
default implementation of getOrCreateSymbolData in MCStreamer does not support
tracking the symbol data.  In order to support the semantics of thumb functions,
track symbol data in assembly streamer.  Although O(n) in number of labels in
the TU, this is already done in various other streamers and as such the memory
overhead is not a practical concern in this scenario.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204544 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-22 19:26:18 +00:00
Rafael Espindola
a60f719c8d Fix the value computation in
sym_a:
sym_d = sym_a + 1

This is the smallest fix I was able to extract from what got reverted in
r204203.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204527 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-21 22:00:29 +00:00
Rafael Espindola
3f687d350c Move codegen test over to MC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204490 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-21 17:55:34 +00:00
Rafael Espindola
6c22b041da Split out the MC part of this test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204481 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-21 17:16:11 +00:00
Richard Sandiford
6b6889d87b [SystemZ] Add support for z196 float<->unsigned conversions
These complement the older float<->signed instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204451 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-21 10:56:30 +00:00
Jiangning Liu
705e53e2aa This reverts commit r203762, "ARM: support emission of complex SO expressions".
The commit r203762 introduced silent failure for complext SO expression, and it's even worse than compiler crash.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204427 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-21 02:51:01 +00:00
Rafael Espindola
5b460ed4cd Convert a CodeGen test into a MC test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204421 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-21 00:55:42 +00:00
Rafael Espindola
aeb12e91d1 Convert another CodeGen test into a MC test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204412 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-20 23:35:00 +00:00
Greg Fitzgerald
aff0ab4e7c llvm-objdump output hex to match binutils' objdump
Patch by Ted Woodward

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204409 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-20 22:55:15 +00:00
Rafael Espindola
f59d05cf35 Convert CodeGen test into a more specific MC test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204406 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-20 22:05:59 +00:00
Kai Nacke
ebf9f0c6cb [MIPS] Add cpu octeon and some instructions
The Octeon cpu from Cavium Networks is mips64r2 based and has an extended
instruction set. In order to utilize this with LLVM, a new cpu feature "octeon"
and a subtarget feature "cnmips" is added. A small set of new instructions
(baddu, dmul, pop, dpop, seq, sne) is also added. LLVM generates dmul, pop and
dpop instructions with option -mcpu=octeon or -mattr=+cnmips.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204337 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-20 11:51:58 +00:00
Zoran Jovanovic
37fb9b9591 Provide an operand for microMIPS wait instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204329 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-20 10:41:37 +00:00
Zoran Jovanovic
3ac3e7451b Implementation of microMIPS 16-bit instructions MOVE and JALR.
Differential Revision: http://llvm-reviews.chandlerc.com/D3112


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204325 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-20 10:18:24 +00:00
Zoran Jovanovic
b71fd20f2d Mark alias symbols as microMIPS if necessary. Differential Revision: http://llvm-reviews.chandlerc.com/D3080
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204323 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-20 09:44:49 +00:00
Craig Topper
6ee83c07a0 Test case for r204305.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204316 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-20 06:45:10 +00:00
Saleem Abdulrasool
9320b807aa Reapply 'ARM IAS: support .thumb_set'
Re-apply the change after it was reverted to do conflicts due to another change
being reverted.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204306 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-20 06:05:33 +00:00
Rafael Espindola
0a70f9b3b9 Look through variables when computing relocations.
Given

bar = foo + 4
	.long bar

MC would eat the 4. GNU as includes it in the relocation. The rule seems to be
that a variable that defines a symbol is used in the relocation and one that
does not define a symbol is evaluated and the result included in the relocation.

Fixing this unfortunately required some other changes:

* Since the variable is now evaluated, it would prevent the ELF writer from
  noticing the weakref marker the elf streamer uses. This patch then replaces
  that with a VariantKind in MCSymbolRefExpr.

* Using VariantKind then requires us to look past other VariantKind to see

	.weakref	bar,foo
	call	bar@PLT

  doing this also fixes

	zed = foo +2
	call zed@PLT

  so that is a good thing.

* Looking past VariantKind means that the relocation selection has to use
  the fixup instead of the target.

This is a reboot of the previous fixes for MC. I will watch the sanitizer
buildbot and wait for a build before adding back the previous fixes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204294 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-20 02:12:01 +00:00