Commit Graph

23 Commits

Author SHA1 Message Date
Akira Hatanaka
f09378397e [MCInstPrinter] Enable MCInstPrinter to change its behavior based on the
per-function subtarget.

Currently, code-gen passes the default or generic subtarget to the constructors
of MCInstPrinter subclasses (see LLVMTargetMachine::addPassesToEmitFile), which
enables some targets (AArch64, ARM, and X86) to change their instprinter's
behavior based on the subtarget feature bits. Since the backend can now use
different subtargets for each function, instprinter has to be changed to use the
per-function subtarget rather than the default subtarget.

This patch takes the first step towards enabling instprinter to change its
behavior based on the per-function subtarget. It adds a bit "PassSubtarget" to
AsmWriter which tells table-gen to pass a reference to MCSubtargetInfo to the
various print methods table-gen auto-generates. 

I will follow up with changes to instprinters of AArch64, ARM, and X86.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233411 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-27 20:36:02 +00:00
Eric Christopher
fde0733828 Grab the subtarget off of the machine function for the R600
asm printer and clean up a bunch of uses.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229803 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 01:10:53 +00:00
Eric Christopher
2b8ccbf2ad Remove the DisasmEnabled AsmPrinter variable and just look it
up on the subtarget where it's set anyhow than looking it up
2-3 times in the same place.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229802 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 01:10:49 +00:00
Eric Christopher
0def30471a Reuse a bunch of cached subtargets and remove getSubtarget calls
without a Function argument.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227638 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-30 23:24:40 +00:00
Tom Stellard
6dc4d8f0ed R600/SI: Use external symbols for scratch buffer
We were passing the scratch buffer address to the shaders via user sgprs,
but now we use external symbols and have the driver patch the shader
using reloc information.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226586 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-20 17:49:47 +00:00
Marek Olsak
6589ea14e7 R600/SI: Don't shrink instructions whose e32 encoding doesn't exist
v2: modify hasVALU32BitEncoding instead
v3: - add pseudoToMCOpcode helper to AMDGPUInstInfo, which is used by both
      hasVALU32BitEncoding and AMDGPUMCInstLower::lower
    - report an error if a pseudo can't be lowered

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226188 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-15 18:42:51 +00:00
Tom Stellard
d90e5063ca R600/SI: Add pattern for bitcasting fp immediates to integers
The backend now assumes that all immediates are integers.  This allows
us to simplify immediate handling code, becasue we no longer need to
handle fp and integer immediates differently.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225844 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-13 22:59:41 +00:00
Matt Arsenault
aa14ffddcf R600/SI: Fix f64 inline immediates
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224458 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-17 21:04:08 +00:00
Marek Olsak
7eeb607497 R600/SI: Add VI instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223603 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-07 12:18:57 +00:00
Eric Christopher
9f85dccfc6 Remove the TargetMachine forwards for TargetSubtargetInfo based
information and update all callers. No functional change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214781 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-04 21:25:23 +00:00
Tom Stellard
b664d47cb0 R600/SI: Store constant initializer data in constant memory
This implements a solution for constant initializers suggested
by Vadim Girlin, where we store the data after the shader code
and then use the S_GETPC instruction to compute its address.

This saves use the trouble of creating a new buffer for constant data
and then having to pass the pointer to the kernel via user SGPRs or the
input buffer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213530 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-21 14:01:14 +00:00
Tom Stellard
6b0a08b15b R600: Move AMDGPUInstrInfo from AMDGPUTargetMachine into AMDGPUSubtarget
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210869 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-13 01:32:00 +00:00
Aaron Ballman
50d09f1212 Resolving MSVC warnings about switch statements with a default label, but no case labels. No functional changes intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209126 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-19 14:29:04 +00:00
Tom Stellard
17200e3bb3 R600/SI: Refactor the VOP3_32 tablegen class
This will allow us to use a single MachineInstr to represent
instructions which behave the same but have different encodings
on some subtargets.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209028 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-16 20:56:47 +00:00
David Blaikie
b29a2b0c4c MachineInstr: introduce explicit_operands and implicit_operands ranges
Makes iteration over implicit and explicit machine operands more
explicit (har har). Insipired by code review discussion for r205565.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205680 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-05 22:42:04 +00:00
Tom Stellard
34faf78241 R600: Verify all instructions in the AsmPrinter on debug builds
Make a call to R600's implementation of verifyInstruction() to
check that instructions are only using legal operands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202544 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-28 21:36:41 +00:00
David Woodhouse
2ddea4b44d Explictly pass MCSubtargetInfo to MCCodeEmitter::EncodeInstruction()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200348 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-28 23:13:07 +00:00
David Woodhouse
4396f5d9d2 Change MCStreamer EmitInstruction interface to take subtarget info
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200345 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-28 23:12:42 +00:00
Tom Stellard
f931867317 R600: Store disassembly in a special ELF section when feature +DumpCode is enabled.
Patch by: Jay Cornwall

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192523 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-12 05:02:51 +00:00
Chandler Carruth
0b8c9a80f2 Move all of the header files which are involved in modelling the LLVM IR
into their new header subdirectory: include/llvm/IR. This matches the
directory structure of lib, and begins to correct a long standing point
of file layout clutter in LLVM.

There are still more header files to move here, but I wanted to handle
them in separate commits to make tracking what files make sense at each
layer easier.

The only really questionable files here are the target intrinsic
tablegen files. But that's a battle I'd rather not fight today.

I've updated both CMake and Makefile build systems (I think, and my
tests think, but I may have missed something).

I've also re-sorted the includes throughout the project. I'll be
committing updates to Clang, DragonEgg, and Polly momentarily.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171366 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-02 11:36:10 +00:00
Chandler Carruth
58a2cbef4a Resort the #include lines in include/... and lib/... with the
utils/sort_includes.py script.

Most of these are updating the new R600 target and fixing up a few
regressions that have creeped in since the last time I sorted the
includes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171362 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-02 10:22:59 +00:00
Tom Stellard
3ee6391e0c R600: BB operand support for SI
Patch by: Christian König

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Christian König <deathsimple@vodafone.de>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170342 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-17 15:14:54 +00:00
Tom Stellard
f98f2ce29e Add R600 backend
A new backend supporting AMD GPUs: Radeon HD2XXX - HD7XXX

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169915 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-11 21:25:42 +00:00