Commit Graph

99128 Commits

Author SHA1 Message Date
Lang Hames
268ab86f6c Add missing test case for r198737.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198772 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 16:31:16 +00:00
Nico Rieck
113906398b Remove mention of old deleted test scripts from testing guide
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198771 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 16:30:03 +00:00
Richard Sandiford
e333ed2177 [DAGCombiner] Factor duplicated rotate code into a separate function
No functional change intended.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198768 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 15:40:47 +00:00
Alp Toker
598887906b lit: Provide file location in cfg error messages
Python doesn't do a good job at diagnosing string exec() so use execfile()
where available.

This should be a timesaver when trying to get to the bottom of build bot
failures.

Before:

    File "llvm/utils/lit/lit/TestingConfig.py", line 93, in load_from_path
      exec("exec data in cfg_globals")
    File "<string>", line 1, in <module>
    File "<string>", line 194, in <module>
  NameError: name 'typo' is not defined

After:

    File "llvm/utils/lit/lit/TestingConfig.py", line 95, in load_from_path
    execfile(path, cfg_globals)
    File "clang/test/lit.cfg", line 194, in <module>
      typo
      ^~~~
  NameError: name 'typo' is not defined

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198766 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 14:20:59 +00:00
David Woodhouse
38b362617c [x86] Support R_386_PC8, R_386_PC16 and R_X86_64_PC8
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198763 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 12:58:40 +00:00
David Woodhouse
51a64502bf [x86] Add JMP_2 and other 16-bit PC-relative branch instructions
Mark them as requiring 16-bit mode for now, since we don't yet have
relaxation support for FK_Data_2.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198762 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 12:58:36 +00:00
David Woodhouse
2634d1f6da [x86] Do not relax PUSHi16 to PUSHi32 (PR18414)
They do *different* things to %esp, so they are not equivalent.

Rename PUSHi8 to PUSH32i8 and add the missing PUSH16i8.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198761 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 12:58:32 +00:00
David Woodhouse
ab5b9489e9 [x86] Make AsmParser validate registers for memory operands a bit better
We can't do a perfect job here. We *have* to allow (%dx) even in 64-bit
mode, for example, because it might be used for an unofficial form of
the in/out instructions. We actually want to do a better job of validation
*later*. Perhaps *instead* of doing it where we are at the moment.

But for now, doing what validation we *can* do in the place that the code
already has its validation, is an improvement.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198760 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 12:58:28 +00:00
David Woodhouse
aab59870a4 [x86] Fix MOV8ao8 et al for 16-bit mode, fix up disassembler to understand
It seems there is no separate instruction class for having AdSize *and*
OpSize bits set, which is required in order to disambiguate between all
these instructions. So add that to the disassembler.

Hm, perhaps we do need an AdSize16 bit after all?

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198759 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 12:58:24 +00:00
David Woodhouse
4f32ce2436 [x86] Use 16-bit addressing where possible in 16-bit mode
Where "where possible" means that it's an immediate value and it's below
0x10000. In fact GAS will either truncate or error with larger values,
and will insist on using the addr32 prefix to get 32-bit addressing. So
perhaps we should do that, in a later patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198758 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 12:58:18 +00:00
David Woodhouse
975fe2cfc3 [x86] Fix JCXZ,JECXZ_32 for 16-bit mode
JCXZ should have the 0x67 prefix only if we're in 32-bit mode, so make that
appropriately conditional. And JECXZ needs the prefix instead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198757 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 12:58:12 +00:00
David Woodhouse
d7ae82f8f5 [x86] Disambiguate RET[QL] and fix aliases for 16-bit mode
I couldn't see how to do this sanely without splitting RETQ from RETL.

Eric says: "sad about the inability to roundtrip them now, but...".
I have no idea what that means, but perhaps it wants preserving in the
commit comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198756 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 12:58:07 +00:00
David Woodhouse
1c75f15a60 [x86] Disambiguate [LS][IG]DT{32,64}m and add 16-bit versions, fix aliases
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198755 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 12:57:55 +00:00
David Woodhouse
ce8d7befbf [x86] Add JMP16[rm],CALL16[rm] instructions, and fix up aliases
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198754 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 12:57:49 +00:00
David Woodhouse
1a19e26276 [x86] Add PUSHA16,POPA16 instructions, and fix aliases for 16-bit mode
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198753 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 12:57:45 +00:00
David Woodhouse
a493812047 [x86] Add OpSize16 to instructions that need it
This fixes the bulk of 16-bit output, and the corresponding test case
x86-16.s now looks mostly like the x86-32.s test case that it was
originally based on. A few irrelevant instructions have been dropped,
and there are still some corner cases to be fixed in subsequent patches.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198752 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 12:57:40 +00:00
Rafael Espindola
5de64fcb5e Use -std=gnu99 in tools/llvm-c-test/CMakeLists.txt
With a current mingw (gcc 4.8.1) it looks like we hit some variation of

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=40278

The end result is that off_t is not defined and the build fails without this
patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198749 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 11:48:19 +00:00
Alp Toker
b1adf0890a CMake: Provide LLVM_PLUGIN_EXT definition
This is needed to support the addition of tests for clang loadable plugins.

In clang, plugins are built as modules (bundles on OS X) rather than dynamic
libraries (dylib) so the build system needs to inform lit of the actual
file extension in use, typically '.so' on Unix and '.dll' on Windows.

(LLVM itself should probably switch to this scheme to fix PR14903 once and for
all.)

No change in build output or functionality intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198746 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 11:10:24 +00:00
Elena Demikhovsky
958cc01fff AVX-512: Added more intrinsics for pmin/pmax, pabs, blend, pmuldq.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198745 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 10:54:22 +00:00
Iain Sandoe
9c0a05c7af [patch] Adjust behavior of FDE cross-section relocs for targets that don't support abs-differences.
Modern versions of OSX/Darwin's ld (ld64 > 97.17) have an optimisation present that allows the back end to omit relocations (and replace them with an absolute difference) for FDE some text section refs.

This patch allows a backend to opt-in to this behaviour by setting "DwarfFDESymbolsUseAbsDiff".  At present, this is only enabled for modern x86 OSX ports.

test changes by David Fang.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198744 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 10:22:54 +00:00
Kevin Qin
4712264fb8 [AArch64 NEON] Fix generating incorrect value type of NEON_VDUPLANE
when lower build_vector if result value type mismatch with operand
value type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198743 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 08:06:14 +00:00
Venkatraman Govindaraju
8f5124903f [SparcV9] Rename operands in some sparc64 instructions so that TableGen can encode them correctly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198740 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 07:47:57 +00:00
Venkatraman Govindaraju
f0e4bf2daa [Sparc] Correct the mask for fixup_sparc_br19.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198739 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 06:46:51 +00:00
Venkatraman Govindaraju
7ceaa8623c [Sparc] Add support for parsing branch instructions and conditional moves.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198738 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 06:14:52 +00:00
Lang Hames
42fdb1f00f Re-apply r196639: Add support for archives and object file caching under MCJIT.
I believe the bot failures on linux systems were due to overestimating the
alignment of object-files within archives, which are only guaranteed to be
two-byte aligned. I have reduced the alignment in
RuntimeDyldELF::createObjectImageFromFile accordingly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198737 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 04:09:09 +00:00
Saleem Abdulrasool
0fe78d5669 tests: disable ARM unwinding tests if ARM is unavailable
Appease the buildbots for targets which do not build the ARM support by moving
the ARM specific test into a subdirectory and use the lit configuration to
disable them appropriately.

Thanks to chapuni and thakis for explaining how to do this!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198736 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 03:44:01 +00:00
Saleem Abdulrasool
cb914a32d6 ARM IAS: properly handle expression operands
Operands which involved label arithemetic would previously fail to parse.  This
corrects that by adding the additional case for the shift operand validation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198735 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 03:28:14 +00:00
Saleem Abdulrasool
bc41190a74 llvm-readobj: add support for ARM EHABI unwind info
This adds some preliminary support for decoding ARM EHABI unwinding information.
The major functionality that remains from complete support is bytecode
translation.

Each Unwind Index Table is printed out as a separate entity along with its
section index, name, offset, and entries.

Each entry lists the function address, and if possible, the name, of the
function to which it corresponds.  The encoding model, personality routine or
index, and byte code is also listed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198734 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 03:28:09 +00:00
Hao Liu
9e0fd27ce7 Fix a bug about generating undef operand when optimising shuffle vector and insert element in instruction combine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198730 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 03:06:15 +00:00
David Woodhouse
476136e951 [x86] Kill gratuitous X86_{32,64}TargetMachine subclasses, use X86TargetMachine
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198720 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 00:08:50 +00:00
Rafael Espindola
b56c57bcbb Move the llvm mangler to lib/IR.
This makes it available to tools that don't link with target (like llvm-ar).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198708 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-07 21:19:40 +00:00
Roman Divacky
7e889af768 In the ELFWriter when writing aliased (.set) symbols dont blindly
take type from the new symbol but merge them so that the type
is never "downgraded".

This is probably quite rare, except for IFUNC symbols which
we used to misassemble, losing the IFUNC type.

Fixes #18372.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198706 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-07 20:17:03 +00:00
Cameron McInally
67cc1dc995 Fix uninitialized variable warning in DataLayout.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198702 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-07 19:51:38 +00:00
Rafael Espindola
e3b54e2e50 Don't assert with private type info variables.
With the gnu objc runtime private strings are used. Since we only need to
produce a unique label, the fix is to just drop the asserts.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198701 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-07 19:38:47 +00:00
Benjamin Kramer
5f9cb7b569 Emit arange padding with a single directive.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198700 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-07 19:28:14 +00:00
David Peixotto
6f9a004738 Add ARM fconsts/fconstd aliases for vmov.f32/vmov.f64
This commit adds the pre-UAL aliases of fconsts and fconstd for
vmov.f32 and vmov.f64. They use an InstAlias rather than a
MnemonicAlias to properly support the predicate operand.

We need to support encoded 8-bit constants in order to implement the
pre-UAL fconsts/fconstd aliases for vmov.f32/vmov.f64, so this
commit also fixes parsing of encoded floating point constants used
in vmov.f32/vmov.f64 instructions. Now we can support assembly code
like this:

  fconsts s0, #0x70

which is equivalent to vmov.f32 s0, #1.0.

Most of the code was already in place to support this feature.
Previously the code was trying to accept encoded 8-bit float
constants for the vmov.f32/vmov.f64 instructions.  It looks like the
support for parsing encoded floats was lost in a refactoring in
commit r148556 and we did not have any tests in place to catch it.

The change in this commit is to keep the parsed value as a 32-bit
float instead of a 64-bit double because that is what the isFPImm()
function expects to find. There is no loss of precision by using a
32-bit float here because we are still limited to an 8-bit encoded
value in the end.

Additionally, we explicitly reject encoded 8-bit floats for
vmovf.32/64. This is the same as the current behavior, but we now do
it explicitly rather than accidently.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198697 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-07 18:19:23 +00:00
Logan Chien
1485d51a16 [arm] Fix an incorrect comment in ARMUnwindOpAsm.h.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198696 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-07 17:47:25 +00:00
Chandler Carruth
1446dc9ba8 Try to fix the windows build. The comments in other files don't seem to
be quite accurate. =]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198690 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-07 12:37:13 +00:00
Chandler Carruth
bc65a8d518 Move the LLVM IR asm writer header files into the IR directory, as they
are part of the core IR library in order to support dumping and other
basic functionality.

Rename the 'Assembly' include directory to 'AsmParser' to match the
library name and the only functionality left their -- printing has been
in the core IR library for quite some time.

Update all of the #includes to match.

All of this started because I wanted to have the layering in good shape
before I started adding support for printing LLVM IR using the new pass
infrastructure, and commandline support for the new pass infrastructure.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198688 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-07 12:34:26 +00:00
Chandler Carruth
974a445bd9 Re-sort all of the includes with ./utils/sort_includes.py so that
subsequent changes are easier to review. About to fix some layering
issues, and wanted to separate out the necessary churn.

Also comment and sink the include of "Windows.h" in three .inc files to
match the usage in Memory.inc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198685 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-07 11:48:04 +00:00
Hao Liu
1a080cef90 [AArch64]Add support to spill/fill D tuples such as DPair/DTriple/DQuad. There is no test cases for D tuple as the original test cases are too large. As the spill/fill of the D tuple is similar to the Q tuple, the correctness can be guaranteed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198684 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-07 10:50:43 +00:00
NAKAMURA Takumi
bba676f3fe [CMake] Introduce llvm_update_compile_flags(target_name) to update compile flags in target properties.
FIXME: Just add_unittest() is using it.
FIXME: Cooperate with source properties.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198683 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-07 10:24:14 +00:00
Hao Liu
9cca551091 [AArch64]Add support to copy D tuples such as DPair/DTriple/DQuad and Q tuples such as QPair/QTriple/QQuad. There is no test case for D tuple as the original test cases are too large. As the copy of the D tuple is similar to the Q tuple, the correctness can be guaranteed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198682 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-07 10:00:03 +00:00
Venkatraman Govindaraju
dff38618c6 [Sparc] Add support for parsing sparc asm modifiers such as %hi, %lo etc.,
Also, correct the offsets for FixupsKindInfo.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198681 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-07 08:00:49 +00:00
Andrew Trick
9c15f4c9c9 Fix for PR18396: Assertion: MO->isDead "Cannot fold physreg def".
InlineSpiller::foldMemoryOperand needs to handle undef call operands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198679 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-07 07:31:10 +00:00
Andrew Trick
b4e0c9b85d Reapply r198654 "indvars: sink truncates outside the loop."
This doesn't seem to have actually broken anything. It was paranoia
on my part. Trying again now that bots are more stable.

This is a follow up of the r198338 commit that added truncates for
lcssa phi nodes. Sinking the truncates below the phis cleans up the
loop and simplifies subsequent analysis within the indvars pass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198678 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-07 06:59:12 +00:00
Kevin Qin
a4d123f461 [AArch64 NEON] Fixed incorrect immediate used in BIC instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198675 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-07 05:10:47 +00:00
Saleem Abdulrasool
6a4207d263 ARM IAS: allow more depth in contextual diagnostics
Switch the context to be SmallVectors.  This allows for saving additional
context when providing previous emission sites.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198665 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-07 02:29:00 +00:00
Saleem Abdulrasool
a83f45be97 ARM IAS: refactor unwind context
Move the unwinding context for the ARM IAS into a helper class.  This is purely
a structural refactoring.  A follow up change allows for recording additional
depth to improve diagnostics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198664 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-07 02:28:55 +00:00
Saleem Abdulrasool
9d76f40575 ARM Streamer: print out tag names
If using verbose asm, print out the friendly name of the tag if possible.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198663 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-07 02:28:50 +00:00