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22 Commits

Author SHA1 Message Date
Benjamin Kramer
d628f19f5d [C++11] Replace llvm::next and llvm::prior with std::next and std::prev. 
Remove the old functions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202636 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-03-02 12:27:27 +00:00
Michel Danzer
644aecfc97 R600/SI: Optimize SI_KILL for constant operands 
If the SI_KILL operand is constant, we can either clear the exec mask if
the operand is negative, or do nothing otherwise.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202337 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-02-27 01:47:09 +00:00
Michel Danzer
a5fbf24716 R600/SI: Allow SI_KILL for geometry shaders 
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202336 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-02-27 01:47:02 +00:00
Matt Arsenault
69bc4ddf10 R600/SI: Fix assertion on infinite loops. 
This isn't the most useful case to fix in the real world,
but bugpoint runs into this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201177 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-02-11 21:12:38 +00:00
Tom Stellard
42faffddb9 R600/SI: Initialize M0 and emit S_WQM_B64 whenever DS instructions are used 
DS instructions that access local memory can only uses addresses that
are less than or equal to the value of M0.  When M0 is uninitialized,
then we experience undefined behavior.

This patch also changes the behavior to emit S_WQM_B64 on pixel shaders
no matter what kind of DS instruction is used.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201097 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-02-10 16:58:30 +00:00
Tom Stellard
835f1c01bf R600/SI: Only use S_WQM_B64 in pixel shaders 
This doesn't change any functionality, since we only have two shader
types (compute and pixel) that use local memory.  We're just changing
the logic to match the documentation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201096 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-02-10 16:58:27 +00:00
Matt Arsenault
17427fa9bb Use llvm_unreachable instead of assert(0) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196971 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-12-10 21:37:42 +00:00
Tom Stellard
a2b4eb6d15 R600/SI: Add support for private address space load/store 
Private address space is emulated using the register file with
MOVRELS and MOVRELD instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194626 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-11-13 23:36:50 +00:00
Tom Stellard
79916948e1 R600: Add support for local memory atomic add 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190080 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-05 18:38:09 +00:00
Tom Stellard
402b8e2175 R600/SI: Don't emit S_WQM_B64 instruction for compute shaders 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190077 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-05 18:37:52 +00:00
Michel Danzer
7740daa8ba R600/SI: Initial support for LDS/GDS instructions 
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186009 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-07-10 16:36:43 +00:00
Bill Wendling
b5632b5b45 Don't cache the instruction and register info from the TargetMachine, because 
the internals of TargetMachine could change.

No functionality change intended.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183561 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-06-07 20:28:55 +00:00
Christian Konig
03cd75eedb R600/SI: replace WQM intrinsic 
Just enable WQM when we see an LDS interpolation instruction.

Signed-off-by: Christian König <christian.koenig@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178019 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-03-26 14:03:50 +00:00
Christian Konig
e981802d9b R600/SI: fix ELSE pseudo op handling 
Restore the EXEC mask early, otherwise a copy might end up not beeing executed.

Candidate for the mesa stable branch.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178018 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-03-26 14:03:44 +00:00
Christian Konig
b9e8678025 R600/SI: implement indirect adressing for SI 
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177277 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-03-18 11:34:16 +00:00
Christian Konig
e25e490793 R600/SI: cleanup literal handling v3 
Seems to be allot simpler, and also paves the
way for further improvements.

v2: rebased on master, use 0 in BUFFER_LOAD_FORMAT_XYZW,
    use VGPR0 in dummy EXP, avoid compiler warning, break
    after encoding the first literal.
v3: correctly use V_ADD_F32_e64

This is a candidate for the stable branch.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175354 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-02-16 11:28:22 +00:00
NAKAMURA Takumi
9262a64b30 R600/SILowerControlFlow.cpp: Fix a warning. [-Wunused-variable] 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173040 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-01-21 14:06:48 +00:00
Tom Stellard
935a91540b R600: Optimize and cleanup KILL on SI 
We shouldn't insert KILL optimization if we don't have a
kill instruction at all.

Patch by: Christian König

Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Signed-off-by: Christian König <deathsimple@vodafone.de>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172845 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-01-18 21:15:50 +00:00
Tom Stellard
b06c540f9f R600: Coding style - remove empty spaces from the beginning of functions 
No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170923 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 20:12:02 +00:00
Tom Stellard
d09d43ae53 R600: control flow optimization 
Branch if we have enough instructions so that it makes sense.
Also remove branches if they don't make sense.

Patch by: Christian König

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Christian König <deathsimple@vodafone.de>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170592 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-19 22:10:33 +00:00
Tom Stellard
6b7d99d473 R600: New control flow for SI v2 
This patch replaces the control flow handling with a new
pass which structurize the graph before transforming it to
machine instruction. This has a couple of different advantages
and currently fixes 20 piglit tests without a single regression.

It is now a general purpose transformation that could be not
only be used for SI/R6xx, but also for other hardware
implementations that use a form of structurized control flow.

v2: further cleanup, fixes and documentation

Patch by: Christian König

Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170591 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-19 22:10:31 +00:00
Tom Stellard
f98f2ce29e Add R600 backend 
A new backend supporting AMD GPUs: Radeon HD2XXX - HD7XXX

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169915 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-11 21:25:42 +00:00