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280 Commits

Author SHA1 Message Date
Evan Cheng
b43216ee4a - Off by one bugs in maximum displacement calculation / testing. 
- In thumb mode, a new constpool island BB size should be 4 + 2 to
  compensate for the potential padding due to alignment requirement.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33753 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-01 10:16:15 +00:00
Evan Cheng
e0c2b6b9a8 .set pc relative displacement bug: label should be moved down one instruction 
to just before the add r1, pc:

Before:
        .set PCRELV0, (LJTI1_0_0-(LPCRELL0+4))
LPCRELL0:
        mov r1, #PCRELV0
        add r1, pc

Now:
        .set PCRELV0, (LJTI1_0_0-(LPCRELL0+4))
        mov r1, #PCRELV0
LPCRELL0:
        add r1, pc


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33744 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-01 03:04:49 +00:00
Evan Cheng
736cefff85 Add a note. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33743 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-01 02:46:20 +00:00
Evan Cheng
9312313a56 Also set alignment of stack-based structs to 4 in thumb mode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33741 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-01 02:18:36 +00:00
Evan Cheng
9d945f78e5 Special epilogue for vararg functions. We cannot do a pop to pc because 
there follows a sp increment for the va register save region. Instead issue
a separate pop to another register, increment sp, and then return:
        pop {r4, r5, r6, r7}
        pop {r3}
        add sp, #3 * 4
        bx r3


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33739 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-01 01:49:46 +00:00
Evan Cheng
2021abe154 Pessmistically assume the .align 2 before the first constpool entry adds 
two bytes padding.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33734 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-01 01:09:47 +00:00
Evan Cheng
5b49ab9996 Possible JT improvements. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33733 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-01 01:07:48 +00:00
Evan Cheng
3bf12d0460 Don't emit unnecessary .align directive. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33729 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-31 23:39:39 +00:00
Evan Cheng
a2e35588c6 Handle an interesting corner case: the constpool_entry being reference is two 
instructions away, i.e. its address is equal to PC.
        %r0 = tLDRpci <cp#0>
        bx
        CONSTPOOL_ENTRY 0 <cp#0>, 4


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33728 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-31 23:35:18 +00:00
Evan Cheng
7588ad478a Don't want to add FramePtr to callee save spill list twice. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33727 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-31 23:17:29 +00:00
Evan Cheng
3548006a29 Darwin ABI requires FP to point to stack slot of prev FP. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33724 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-31 22:25:33 +00:00
Evan Cheng
11a065e599 Add entry. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33723 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-31 22:11:38 +00:00
Evan Cheng
0fa10515ee Thumb add sp, #imm requires the immediate value be multiple of 4. For now, 
change preferred alignment of short, byte, bool to 4.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33722 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-31 22:08:40 +00:00
Evan Cheng
86eb515359 Update comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33721 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-31 22:06:44 +00:00
Evan Cheng
3471b60e95 Thumb asm syntax does not want 's' suffix for flag setting opcodes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33717 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-31 20:12:31 +00:00
Evan Cheng
c0dbec7e10 When determining whether a pc relative branch / load displacement fits in the 
instruction field, adjust it for PC value (4 for thumb, 8 for arm).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33711 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-31 19:57:44 +00:00
Evan Cheng
a9b8b8d62c Some comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33707 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-31 18:29:27 +00:00
Evan Cheng
934536dab2 ConstPool island bug: watch out for cases where UserMI is the last MI of the BB. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33706 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-31 18:19:07 +00:00
Lauro Ramos Venancio
b5b84f92bf ARM fix: Miscompilation when frame pointer can't be eliminated. Uninitialized frame pointer register is used. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33703 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-31 13:12:46 +00:00
Evan Cheng
193f850880 Specify the right CC for comparison libcalls. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33702 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-31 09:30:58 +00:00
Evan Cheng
b6ab2547cb Observe -soft-float. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33699 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-31 08:40:13 +00:00
Evan Cheng
0c61584d05 - Added Thumb constpool island support. 
- Islands are inserted right after the user MI since thumb LDR cannot encode
  negative offset.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33690 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-31 02:22:22 +00:00
Evan Cheng
36640905e1 During PEI, if the immediate value of sp + offset is too large (i.e. something 
that would require > 3 instructions to materialize), load the immediate from a
constpool entry.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33667 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-30 23:01:46 +00:00
Evan Cheng
c60e76d139 - Fix codegen for pc relative constant (e.g. JT) in thumb mode: 
.set PCRELV0, (LJTI1_0_0-(LPCRELL0+4))
LPCRELL0:
        add r1, pc, #PCRELV0
This is not legal since add r1, pc, #c requires the constant be a multiple of 4.
Do the following instead:
        .set PCRELV0, (LJTI1_0_0-(LPCRELL0+4))
LPCRELL0:
        mov r1, #PCRELV0
        add r1, pc

- In thumb mode, it's not possible to use .set generate a pc relative stub
  address. The stub is ARM code which is in a different section from the thumb
  code. Load the value from a constpool instead.
- Some asm printing clean up.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33664 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-30 20:37:08 +00:00
Reid Spencer
5cbf985dcb For PR1136: Rename GlobalVariable::isExternal as isDeclaration to avoid 
confusion with external linkage types.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33663 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-30 20:08:39 +00:00
Evan Cheng
ad1b9a503c Copy and paste bug. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33658 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-30 08:22:33 +00:00
Evan Cheng
b267ca17d1 Darwin -static should codegen static ctors / dtors to .constructor / .destructor sections. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33657 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-30 08:04:53 +00:00
Evan Cheng
c322a9ac14 Misseed thumb jumptable branch. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33656 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-30 08:03:06 +00:00
Evan Cheng
236f677e48 In thumb mode, round up stack frame size to multiple of 4 since add/sub 
sp, imm instructions implicitly multiply the offset by 4.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33653 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-30 02:57:02 +00:00
Evan Cheng
5b91c7f69a Thumb eliminateFrameIndex fixes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33652 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-30 02:36:01 +00:00
Evan Cheng
cea117d2de Change the operand orders to t_addrmode_s* to make it easier to morph 
instructions that use these address modes to instructions that use
t_addrmode_sp.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33651 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-30 02:35:32 +00:00
Evan Cheng
d1b2c1e88f - In thumb mode, if size of MachineFunction is >= 2048, force LR to be 
spilled (if it is not already).
- If LR is spilled, use BL to implement far jumps. LR is not used as a GPR
  in thumb mode so it can be clobbered if it is properly spilled / restored
  in prologue / epilogue.
- If LR is force spilled but no far jump has been emitted, try undo'ing the
  spill by:
  push lr -> delete
  pop pc -> bx lr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33650 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-30 01:18:38 +00:00
Evan Cheng
225dfe973b Use BL to implement Thumb far jumps. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33649 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-30 01:13:37 +00:00
Evan Cheng
29836c330f Factor GetInstSize() out of constpool island pass. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33644 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-29 23:45:17 +00:00
Nate Begeman
bcc5f36765 Finish off bug 680, allowing targets to custom lower frame and return 
address nodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33636 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-29 22:58:52 +00:00
Evan Cheng
24f7fb3267 Comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33633 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-29 22:23:02 +00:00
Evan Cheng
78268b9436 Remember if LR register has been spilled in this function. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33632 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-29 22:22:24 +00:00
Anton Korobeynikov
b10308e440 Propagate changes from my local tree. This patch includes: 
1. New parameter attribute called 'inreg'. It has meaning "place this
parameter in registers, if possible". This is some generalization of
gcc's regparm(n) attribute. It's currently used only in X86-32 backend.
2. Completely rewritten CC handling/lowering code inside X86 backend.
Merged stdcall + c CCs and fastcall + fast CC.
3. Dropped CSRET CC. We cannot add struct return variant for each
target-specific CC (e.g. stdcall + csretcc and so on).
4. Instead of CSRET CC introduced 'sret' parameter attribute. Setting in
on first attribute has meaning 'This is hidden pointer to structure
return. Handle it gently'.
5. Fixed small bug in llvm-extract + add new feature to
FunctionExtraction pass, which relinks all internal-linkaged callees
from deleted function to external linkage. This will allow further
linking everything together.

NOTEs: 1. Documentation will be updated soon.
       2. llvm-upgrade should be improved to translate csret => sret.
          Before this, there will be some unexpected test fails.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33597 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-28 13:31:35 +00:00
Evan Cheng
198529aaf1 New entry. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33569 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-27 02:33:22 +00:00
Evan Cheng
d85ac4d079 Thumb jumptable support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33568 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-27 02:29:45 +00:00
Evan Cheng
53d7dbafc3 Thumb add / sub with carry. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33562 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-27 00:07:15 +00:00
Lauro Ramos Venancio
ea9fc58bbf Some asm directives fixes for ELF. 
Now we can compile llvm-gcc on arm-linux-gnueabi!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33558 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-26 23:24:43 +00:00
Evan Cheng
3fdadfc9ab Represent tADDspi and tSUBspi as two-address instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33551 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-26 21:33:19 +00:00
Jim Laskey
44c3b9fdd4 Change the MachineDebugInfo to MachineModuleInfo to better reflect usage 
for debugging and exception handling.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33550 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-26 21:22:28 +00:00
Lauro Ramos Venancio
fce1765a19 Fix Data16bitsDirective for ELF. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33549 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-26 21:20:45 +00:00
Evan Cheng
43aeab68a6 Conditional branch being fixed up is not the last MI in the BB, there is a 
unconditional branch following it. Simply invert the condition and swap
destinations if the conditional branch can reach the destination of the
unconditional branch:
beq L1
b   L2
=>
bne L2
b   L1


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33548 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-26 20:38:26 +00:00
Lauro Ramos Venancio
1a92d941b3 If the constant pool value is a extern weak symbol, emit the weak reference. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33543 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-26 19:51:32 +00:00
Evan Cheng
b60c02e005 extload -> zextload 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33542 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-26 19:13:16 +00:00
Jim Laskey
1ee2925742 Make LABEL a builtin opcode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33537 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-26 14:34:52 +00:00
Evan Cheng
dd353b8ad7 SplitBlockBeforeInstr() insert a unconditional branch to the next BB. This 
is unnecessary when we are fixing up a conditional branch since we will be
adding a unconditional branch to the destination of the original branch.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33517 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-26 02:02:39 +00:00