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389 Commits

Author SHA1 Message Date
Dale Johannesen
13e8b51e3e Handle blocks with 2 unconditional branches in AnalyzeBranch. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37571 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-06-13 17:59:52 +00:00
Evan Cheng
bfd2ec4a8e Add a utility routine to check for unpredicated terminator instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37528 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-06-08 21:59:56 +00:00
Evan Cheng
126f17a176 BlockHasNoFallThrough() now returns true if block ends with a return instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37266 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-21 18:44:17 +00:00
Evan Cheng
6ae3626a4f RemoveBranch() and InsertBranch() now returns number of instructions deleted / inserted. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37193 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-18 00:18:17 +00:00
Evan Cheng
1e341729dd Relex assertions to account for additional implicit def / use operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36430 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-25 07:12:14 +00:00
Bill Wendling
6dd29e08f7 Remove some invalid instructions from this check. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36404 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-24 21:17:46 +00:00
Bill Wendling
71bfd11c67 Adding more MMX instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35638 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-03 23:48:32 +00:00
Bill Wendling
823efee633 Add FEMMS and ADDQ. Renamed MMX recipes to prepend the MMX_ to them. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35616 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-03 06:00:37 +00:00
Chris Lattner
995f55036f Compile CodeGen/X86/lea-3.ll:test2 to: 
_test3:
        leaq (,%rdi,4), %rax
        orq %rdi, %rax
        ret

instead of:
_test2:
        movq %rdi, %rax
        shlq $2, %rax
        orq %rdi, %rax
        ret


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35434 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-28 18:12:31 +00:00
Chris Lattner
f2177b89a1 Fix a problem building llvm-gcc on amd64-unknown-freebsd6.2, due to the 
system assembler not groking legal instructions like "leal (,%esi,8), %ecx".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35393 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-28 00:58:40 +00:00
Chris Lattner
a16b7cb1d3 Two changes: 
1) codegen a shift of a register as a shift, not an LEA.
2) teach the RA to convert a shift to an LEA instruction if it wants something
   in three-address form.

This gives us asm diffs like:

-       leal (,%eax,4), %eax
+       shll $2, %eax

which is faster on some processors and smaller on all of them.

and, more interestingly:

-       movl 24(%esi), %eax
-       leal (,%eax,4), %edi
+       movl 24(%esi), %edi
+       shll $2, %edi

Without #2, #1 was a significant pessimization in some cases.

This implements CodeGen/X86/shift-codegen.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35204 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-20 06:08:29 +00:00
Bill Wendling
2f88dcdfb3 Added "padd*" support for MMX. Added MMX move stuff to X86InstrInfo so that 
moves, loads, etc. are recognized.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35031 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-08 22:09:11 +00:00
Jim Laskey
1ee2925742 Make LABEL a builtin opcode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33537 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-26 14:34:52 +00:00
Evan Cheng
258ff6726d convertToThreeAddress() is now responsible for updating live info as well as inserting the new MI's. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32097 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-01 21:52:41 +00:00
Evan Cheng
c0f64ffab9 Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead 
of opcode and number of operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31947 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-27 23:37:22 +00:00
Evan Cheng
e23fc60854 Fix a potential bug: MOVPDI2DI, etc. are not copy instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31794 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-16 23:22:26 +00:00
Evan Cheng
6ce7dc2a97 Properly transfer kill / dead info. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31765 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-15 20:58:11 +00:00
Evan Cheng
7ce4578353 Matches MachineInstr changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31712 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-13 23:36:35 +00:00
Chris Lattner
6ce644392e fix wonky indentation 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31298 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-30 22:27:23 +00:00
Chris Lattner
c24ff8ed12 add another target hook for branch folding. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31262 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-28 17:29:57 +00:00
Chris Lattner
9cd6875917 Implement support for branch condition reversal. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31099 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-21 05:52:40 +00:00
Chris Lattner
879d09cf13 Simplify code, no functionality change 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31097 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-21 05:42:09 +00:00
Chris Lattner
34a84ac81c allow insertion of a conditional branch with fall-through 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31095 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-21 05:34:23 +00:00
Chris Lattner
2a445add12 update assert message 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31093 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-21 04:42:29 +00:00
Chris Lattner
5860715e9d bugfix 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31074 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-20 20:44:34 +00:00
Chris Lattner
7fbe9723e3 Implement branch analysis/xform hooks required by the branch folding pass. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31065 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-20 17:42:20 +00:00
Chris Lattner
ae1dc40327 expose DWARF_LABEL opcode# so the branch folder can update debug info properly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31024 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-17 22:41:45 +00:00
Chris Lattner
d77ddbc0ba remove some dead code 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30938 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-13 20:40:42 +00:00
Chris Lattner
6458f1807d update comments 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30663 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-28 23:33:12 +00:00
Evan Cheng
25ab690a43 Committing X86-64 support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30177 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-08 06:48:29 +00:00
Chris Lattner
2926869b4a Fix a long-standing wart in the code generator: two-address instruction lowering 
actually *removes* one of the operands, instead of just assigning both operands
the same register.  This make reasoning about instructions unnecessarily complex,
because you need to know if you are before or after register allocation to match
up operand #'s with the target description file.

Changing this also gets rid of a bunch of hacky code in various places.

This patch also includes changes to fold loads into cmp/test instructions in
the X86 backend, along with a significant simplification to the X86 spill
folding code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30108 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-05 02:12:02 +00:00
Evan Cheng
55371739de Can't commute shufps. The high / low parts elements come from different vectors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29275 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-25 20:25:40 +00:00
Evan Cheng
efeaed8fb4 Commute shufps / shufpd. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28577 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-30 23:34:30 +00:00
Evan Cheng
a0eaf2d0c5 Somehow I lost a condition when I was shuffling some code around. Anyway, 
only transform a shufps to pshufd when the first two operands are the same.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28575 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-30 22:13:36 +00:00
Evan Cheng
aa3c1410b4 Fix a build breaker. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28574 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-30 21:45:53 +00:00
Evan Cheng
51da42c28f Oops. PSHUFD is only available with SSE2. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28573 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-30 21:30:59 +00:00
Evan Cheng
ccba76bb25 Allow shufps x, x, mask to be converted to pshufd x, mask to save a move. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28565 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-30 20:26:50 +00:00
Evan Cheng
6de0163201 These can be transformed into lea as well. Not that we use this feature 
currently...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28393 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-19 18:43:41 +00:00
Evan Cheng
f4df680ad4 Add MOV16_rm / MOV32_rm and MOV16_mr / MOV32_mr to isLoadFromStackSlot and isStoreToStackSlot 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28223 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-11 07:33:49 +00:00
Evan Cheng
403be7eafc Fixing truncate. Previously we were emitting truncate from r16 to r8 as 
movw. That is we promote the destination operand to r16. So
        %CH = TRUNC_R16_R8 %BP
is emitted as
        movw %bp, %cx.

This is incorrect. If %cl is live, it would be clobbered.
Ideally we want to do the opposite, that is emitted it as
        movb ??, %ch
But this is not possible since %bp does not have a r8 sub-register.

We are now defining a new register class R16_ which is a subclass of R16
containing only those 16-bit registers that have r8 sub-registers (i.e.
AX - DX). We isel the truncate to two instructions, a MOV16to16_ to copy the
value to the R16_ class, followed by a TRUNC_R16_R8.

Due to bug 770, the register colaescer is not going to coalesce between R16 and
R16_. That will be fixed later so we can eliminate the MOV16to16_. Right now, it
can only be eliminated if we are lucky that source and destination registers are
the same.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28164 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-08 08:01:26 +00:00
Chris Lattner
993c897390 Teach the codegen about instructions used for SSE spill code, allowing it 
to optimize cases where it has to spill a lot


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27801 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-18 16:44:51 +00:00
Evan Cheng
11e15b38e9 - More efficient extract_vector_elt with shuffle and movss, movsd, movd, etc. 
- Some bug fixes and naming inconsistency fixes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27377 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-03 20:53:28 +00:00
Evan Cheng
bc4832bc64 Support for scalar to vector with zero extension. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27091 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 23:15:12 +00:00
Evan Cheng
82521dd838 - Remove scalar to vector pseudo ops. They are just wrong. 
- Handle FR32 to VR128:v4f32 and FR64 to VR128:v2f64 with aliases of MOVAPS
and MOVAPD. Mark them as move instructions and *hope* they will be deleted.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26919 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-21 07:09:35 +00:00
Evan Cheng
fe5cb19405 1. Use pxor instead of xoraps / xorapd to clear FR32 / FR64 registers. This 
proves to be worth 20% on Ptrdist/ks. Might be related to dependency
   breaking support.
2. Added FsMOVAPSrr and FsMOVAPDrr as aliases to MOVAPSrr and MOVAPDrr. These
   are used for FR32 / FR64 reg-to-reg copies.
3. Tell reg-allocator to generate MOVSSrm / MOVSDrm and MOVSSmr / MOVSDmr to
   spill / restore FsMOVAPSrr and FsMOVAPDrr.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26241 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-16 22:45:17 +00:00
Chris Lattner
1c07e7286d fix operand numbers 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25915 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-02 20:38:12 +00:00
Chris Lattner
4083960147 Move isLoadFrom/StoreToStackSlot from MRegisterInfo to TargetInstrInfo,a far more logical place. Other methods should also be moved if anyoneis interested. :) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25913 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-02 20:12:32 +00:00
Evan Cheng
bda54cdd47 Tell codegen MOVAPSrr and MOVAPDrr are copies. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25889 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-01 23:03:16 +00:00
Nate Begeman
14e2cf62f4 Properly split f32 and f64 into separate register classes for scalar sse fp 
fixing a bunch of nasty hackery


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23735 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-14 22:06:00 +00:00
Nate Begeman
11cefd926a Teach the register allocator that movaps is also a move instruction 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22451 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-16 02:00:20 +00:00