c53479d9c2
Use internal storage for command line option.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139079 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-03 03:45:06 +00:00
2c84e96d3e
Add AVX versions to match AESENC/AESDEC intrinsics. This hopefully ends
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the cycle of missing AVX counterparts of already present SSE* patterns
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139073 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-03 00:47:08 +00:00
9f63615b17
Add AVX version of a SSE4.1 VPBLENDVB pattern
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139072 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-03 00:47:05 +00:00
d01ef7d978
Add AVX versions of SSE4.1 EXTRACTPS patterns
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139071 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-03 00:47:03 +00:00
2b0e0a42d1
Add AVX versions for SSE4.1 MOVZX* patterns
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139070 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-03 00:47:01 +00:00
a67806530c
Add one more AVX pattern for MOVZPQILo2PQI
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139069 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-03 00:46:58 +00:00
d29dd5ec9f
Move PUNPCKLQDQ splat pattern close to the instruction definition and
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duplicate it for AVX mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139068 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-03 00:46:56 +00:00
914a2a319c
Add AVX pattern versions for PSHUFB,PSIGN{B,W,D}
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139067 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-03 00:46:54 +00:00
a4ac989a1c
Add AVX versions of MOVZDI2PDI patterns. Use SUBREG_TO_REG to indicate
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that the AVX versions (even the 128-bit ones) all clear the upper part
of the destination register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139066 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-03 00:46:51 +00:00
152a287374
Enforce subtarget checks in a few places to be explicit when the
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pattern should be matched
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139065 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-03 00:46:49 +00:00
5ab6dcc4bb
Tidy up code moving patterns to their appropriate place!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139064 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-03 00:46:47 +00:00
0e59a04849
Add AVX versions of FsMOVAPS and FsMOVAPS. Teach X86InstrInfo how to use
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it!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139063 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-03 00:46:45 +00:00
645b8be38a
Teach X86FastISel to use AVX versions of instructions when possible
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139062 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-03 00:46:42 +00:00
1aab5515f6
Fix 80-column and style
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139061 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-03 00:46:40 +00:00
e4ccf8a86c
Tidy up some SSE/AVX convert intrinsics. Also add an AVX version of
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OptForSize pattern
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139060 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-03 00:46:38 +00:00
5047d76575
Pseudo CMOV instructions don't clobber EFLAGS.
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The explanation about a 0 argument being materialized as xor is no
longer valid. Rematerialization will check if EFLAGS is live before
clobbering it.
The code produced by X86TargetLowering::EmitLoweredSelect does not
clobber EFLAGS.
This causes one less testb instruction to be generated in the cmov.ll
test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139057 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 23:52:55 +00:00
b8e052e123
Check for EFLAGS live-out before clobbering it.
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It is only allowed to clobber EFLAGS at the end of a block if it isn't
live-in to any successor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139056 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 23:52:52 +00:00
4a1b9d82a4
Use existing function.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139055 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 23:52:49 +00:00
439f71eb30
Remove unused variables.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139047 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 22:41:25 +00:00
4136d23c48
Don't fast-isel for atomic load/store; some cases require extra handling missing from fast-isel.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139044 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 22:33:24 +00:00
d5705fe50d
Change X86 disassembly to print immediates values as signed by default. Special
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case those instructions that the immediate is not sign-extend. radr://8795217
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139028 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 20:01:23 +00:00
d199aa012b
Revert r138826 until PR10834 can be fixed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139018 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 18:15:04 +00:00
a39ccdb9d4
Fix vbroadcast matching logic to early unmatch if the node doesn't have
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only one use. Fix PR10825.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138951 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 18:15:06 +00:00
fc7bc5889b
Move more code around and duplicate AVX patterns: MOVHPS and MOVLPS
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138897 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-31 21:15:32 +00:00
06c982d0e0
Move MOVAPS,MOVUPS patterns close to the instructions definition
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138896 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-31 21:15:29 +00:00
453f4954f2
Remove "_Int" forms of MOVUPSmr and MOVAPSmr
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138895 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-31 21:15:22 +00:00
e81abfd30b
Spelling and grammar fixes to problems found by Duncan.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138858 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-31 16:43:33 +00:00
ac86d43eae
Make sure we don't crash when -miphoneos-version-min is specified on x86. Hopefully this will fix gcc testsuite failures.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138856 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-31 16:19:51 +00:00
c967ad8c88
Rework this conditional a bit.
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Patch by Sanjoy Das
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138853 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-31 04:17:21 +00:00
57d6a5e491
- Move all MOVSS and MOVSD patterns close to their definitions
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- Duplicate some store patterns to their AVX forms!
- Catched a bug while restricting the patterns subtarget, fix it
and update a testcase to check it properly
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138851 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-31 03:04:20 +00:00
fc646a6b06
Remove unnecessary AVX checks
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138850 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-31 03:04:14 +00:00
5affa5196f
Teach more places to use VMOVAPS,VMOVUPS instead of MOVAPS,MOVUPS,
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whenever AVX is enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138849 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-31 03:04:09 +00:00
0899f5c62d
Fix (movhps load) lowering / pattern to match more cases. rdar://10050549
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138848 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-31 02:05:24 +00:00
e716124feb
Fix off-by-one error Benjamin noticed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138832 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-30 21:23:24 +00:00
011a8e1684
Enable compact unwind info by default. This only applies to Darwin when CFI is
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disabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138826 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-30 20:54:11 +00:00
cda2a146d1
Fix C++0x narrowing errors when char is unsigned.
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In the case of EDInstInfo, this would actually cause a bug when -1 became 255
and was then compared >=0 in llvm-mc/Disassembler.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138825 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-30 20:53:29 +00:00
151ab3e2f7
Adds support for variable sized allocas. For a variable sized alloca,
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code is inserted to first check if the current stacklet has enough
space. If so, space is allocated by simply decrementing the stack
pointer. Otherwise a runtime routine (__morestack_allocate_stack_space
in libgcc) is called which allocates the required memory from the
heap.
Patch by Sanjoy Das.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138818 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-30 19:47:04 +00:00
d07b7ec772
Adds a SelectionDAG node X86SegAlloca which will be custom lowered
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from DYNAMIC_STACKALLOC.
Two new pseudo instructions (SEG_ALLOCA_32 and SEG_ALLOCA_64) which
will match X86SegAlloca (based on word size) are also added. They
will be custom emitted to inject the actual stack handling code.
Patch by Sanjoy Das.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138814 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-30 19:43:21 +00:00
76927d7586
Emit segmented-stack specific code into function prologues for
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X86. Modify the pass added in the previous patch to call this new
code.
This new prologues generated will call a libgcc routine (__morestack)
to allocate more stack space from the heap when required
Patch by Sanjoy Das.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138812 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-30 19:39:58 +00:00
f3704769bb
Explicitly zero out parts of a vector which are required to be zero by the algorithm in LowerUINT_TO_FP_i32. This only has a substantial effect on the generated code when the input is extracted from a vector register; other ways of loading an i32 do the appropriate zeroing implicitly. Fixes PR10802.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138768 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29 21:15:46 +00:00
41dfabb0e3
Move non-intruction patterns to a more appropriate place!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138744 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29 17:51:24 +00:00
1c36ba50ac
Remove premature previous commit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138725 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-28 14:52:51 +00:00
c98da24bed
Encoding of instructions referencing segments has changed. Do what X86MCCodeEmitter does.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138723 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-28 13:07:57 +00:00
2753ae314f
Silence GCC warnings and make an array const.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138706 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-27 17:36:14 +00:00
43f51aeca8
Add support for generating CMPXCHG16B on x86-64 for the cmpxchg IR instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138660 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-26 21:21:21 +00:00
8fd13b6de5
Fix disassembling of VCVTSD2SI
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138623 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-26 04:49:29 +00:00
f1a264232c
Do the same as r138461. Mark VZEROALL as clobbering all YMM registers
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138592 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-25 22:23:58 +00:00
6292eceea0
Add support for AVX 256-bit version of MOVDDUP!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138588 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-25 21:40:37 +00:00
06ef923d14
Make isMOVDDUP mask check more strict and update comments!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138587 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-25 21:40:34 +00:00
ebc1db0fac
Add more missing TB encodings to VEX instructions to allow them to be disassembled. Fixes remainder of PR10678.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138553 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-25 08:11:01 +00:00
