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Author SHA1 Message Date
Nate Begeman 8a6e7e1214 Revert r114596, it's breaking a few tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114659 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-23 16:49:17 +00:00
Nate Begeman e5cb26fab9 <rdar://problem/8228022> Wvector-conversions warnings in arm_neon.h 
Explicitly cast arguments to the type the builtin expects, which is <vN x i8>



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114596 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-22 22:28:42 +00:00
Nate Begeman 7f1f4089a1 Reapply this transformation now that it is passing the external test which it previously failed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110987 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-13 00:17:53 +00:00
Nate Begeman a966af2f4c Move some code from Verifier into SVI::isValidOperands. This allows us to catch bad shufflevector operations when they are created, rather than waiting for someone to notice later on. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110986 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-13 00:16:46 +00:00
Nate Begeman e32ea923de Add test for recent instcombine vector shuffle enhancement 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110737 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-10 21:58:00 +00:00
Nate Begeman 95743d8748 Add the minimal amount of smarts necessary to instcombine of shufflevectors to recognize 
patterns generated by clang for transpose of a matrix in generic vectors.  This is made
of two parts:

1) Propagating vector extracts of hi/lo half into their users
2) Recognizing an insertion of even elements followed by the odd elements as an unpack.

Testcase to come, but this shrinks the # of shuffle instructions generated on x86 from ~40 to the minimal 8.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110734 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-10 21:38:12 +00:00
Nate Begeman 59d70cbc29 Add tablegen support for vdup_lane 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110419 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-06 01:24:11 +00:00
Nate Begeman d1fb583128 Add support for getting & setting the FPSCR application register on ARM when VFP is enabled. 
Add support for using the FPSCR in conjunction with the vcvtr instruction, for controlling fp to int rounding.
Add support for the FLT_ROUNDS_ node now that the FPSCR is exposed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110152 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-08-03 21:31:55 +00:00
Nate Begeman 0e0a20eb38 Add builtins for ssat/usat, similar to RealView's __ssat and __usat intrinsics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109813 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-29 22:48:09 +00:00
Nate Begeman 692433bc2d Add intrinsics __builtin_arm_qadd & __builtin_arm_qsub to allow access to the QADD & QSUB instructions. 
Behave identically to __qadd & __qsub RealView instruction intrinsics.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109770 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-29 17:56:55 +00:00
Nate Begeman 51409214d7 Implement a vectorized algorithm for <16 x i8> << <16 x i8> 
This is about 4x faster and smaller than the existing scalarization.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109566 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-28 00:21:48 +00:00
Nate Begeman bdcb5afb77 ~40% faster vector shl <4 x i32> on SSE 4.1 Larger improvements for smaller types coming in future patches. 
For:

define <2 x i64> @shl(<4 x i32> %r, <4 x i32> %a) nounwind readnone ssp {
entry:
  %shl = shl <4 x i32> %r, %a                     ; <<4 x i32>> [#uses=1]
  %tmp2 = bitcast <4 x i32> %shl to <2 x i64>     ; <<2 x i64>> [#uses=1]
  ret <2 x i64> %tmp2
}

We get:

_shl:                                   ## @shl
	pslld	$23, %xmm1
	paddd	LCPI0_0, %xmm1
	cvttps2dq	%xmm1, %xmm1
	pmulld	%xmm1, %xmm0
	ret

Instead of:

_shl:                                   ## @shl
	pshufd	$3, %xmm0, %xmm2
	movd	%xmm2, %eax
	pshufd	$3, %xmm1, %xmm2
	movd	%xmm2, %ecx
	shll	%cl, %eax
	movd	%eax, %xmm2
	pshufd	$1, %xmm0, %xmm3
	movd	%xmm3, %eax
	pshufd	$1, %xmm1, %xmm3
	movd	%xmm3, %ecx
	shll	%cl, %eax
	movd	%eax, %xmm3
	punpckldq	%xmm2, %xmm3
	movd	%xmm0, %eax
	movd	%xmm1, %ecx
	shll	%cl, %eax
	movd	%eax, %xmm2
	movhlps	%xmm0, %xmm0
	movd	%xmm0, %eax
	movhlps	%xmm1, %xmm1
	movd	%xmm1, %ecx
	shll	%cl, %eax
	movd	%eax, %xmm0
	punpckldq	%xmm0, %xmm2
	movdqa	%xmm2, %xmm0
	punpckldq	%xmm3, %xmm0
	ret


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109549 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-27 22:37:06 +00:00
Nate Begeman e0efc216eb Fix a crash in the dag combiner caused by ConstantFoldBIT_CONVERTofBUILD_VECTOR calling itself 
recursively and returning a SCALAR_TO_VECTOR node, but assuming the input was always a BUILD_VECTOR.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109519 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-27 18:02:18 +00:00
Nate Begeman 0c07b64fec Make fast isel win64-aware w.r.t. call-clobbered regs 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109069 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-22 00:09:39 +00:00
Nate Begeman c8ea673bc0 Fix a couple issues with Win64 ABI 
1) all registers were spilled as xmm, regardless of actual size
2) win64 abi doesn't do the varargs-size-in-%al thing

Still to look into:

xmm6-15 are marked as clobbered by call instructions on win64 even though they aren't.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109035 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-21 20:49:52 +00:00
Nate Begeman c4a1b652b2 Add support for returning multiple vectors via sret, which is how the ARM target expects the intrinsics to work. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106406 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-20 21:09:52 +00:00
Nate Begeman f8c4c27d84 Modify tablegen to support generating all NEON code used by clang at once. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106207 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-17 04:15:13 +00:00
Nate Begeman 4da883a56f Make VC++ happy 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106054 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-15 22:10:31 +00:00
Nate Begeman 918f8e4ab0 Add the last of the SemaChecking-gen code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105929 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-14 05:17:23 +00:00
Nate Begeman d72c900152 Add a helping of comments 
Add code for generating bits of semachecking


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105907 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-13 04:47:03 +00:00
Nate Begeman cc3c41a9c3 Add generic vector support for bitselect & element byteswap 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105874 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-12 03:09:49 +00:00
Nate Begeman d6645dd4fe Add support for polynomial type, for polynomial multiply 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105792 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-10 18:06:07 +00:00
Nate Begeman 4b425a8caa NEON support for _lane ops, and multiplies by scalar. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105769 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-10 00:16:56 +00:00
Nate Begeman f50551eb08 Further refine types for operations which take scalars. 
This will be used primarily by NEON shift intrinsics.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105733 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-09 18:02:26 +00:00
Nate Begeman 007afe4b4b Specialize I-Class instructions better so that we have less work to do in codegen. 
Parenthesize macro args


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105682 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-09 05:11:55 +00:00
Nate Begeman 6c060dbf84 Handle instructions which need to be #defines for the purpose of capturing constant arguments 
Handle extract hi/lo with common code


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105666 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-09 01:09:00 +00:00
Nate Begeman 96ec22d683 Fix a valgrind error. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105600 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-08 07:11:17 +00:00
Nate Begeman 5638783276 Refine BuiltinsARM.def types a bit, we should do a better job of this to save some c++ code in CGBuiltins. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105598 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-08 06:01:16 +00:00
Nate Begeman 900f4674c1 ARM NEON: 
fix vcvt naming
handle vdup, vcombine with generic vector code


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105588 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-08 00:14:42 +00:00
Nate Begeman b0a4e4554e clang codegen support 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105531 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-07 16:00:37 +00:00
Nate Begeman 9e584b37b0 Handle multi-vector returns and args. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105496 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-04 22:53:30 +00:00
Nate Begeman 7c21f747c7 Additional fixes to BuiltinsARM.def generator, on to clang codegen. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105488 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-04 21:36:00 +00:00
Nate Begeman 92f98af9fb Progress on generating BuiltinsARM.def, still some duplicates to work out. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105461 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-04 07:11:25 +00:00
Nate Begeman 73cef3e9b1 BuiltinsARM.def emitter, still needs a substantial bit of tweaking to lighten the load on clang. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105456 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-04 01:26:15 +00:00
Nate Begeman a8979a0e7b Mangle __builtin_neon_* names appropriately. 
Add skeleton of support for emitting the list of prototypes for BuiltinsARM.def


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105443 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-04 00:21:41 +00:00
Nate Begeman 3861e74490 Add some additional capabilities to the neon emitter 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105416 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-03 21:35:22 +00:00
Nate Begeman 162d3ba464 arm_neon.h now makes it through clang and generates appropriate code for those functions which can use 
generic vector operators rather than __builtin_neon_*


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105380 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-03 04:04:09 +00:00
Nate Begeman 7c8c8830a9 arm_neon.h emitter now mostly complete for the purposes of initial testing. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105349 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-02 21:53:00 +00:00
Nate Begeman e66aab553c Checkpoint; handle 'int' and 'void' correctly 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105316 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-02 07:14:28 +00:00
Nate Begeman af905efc61 Emit full function prototypes. Definitions & typedefs to come. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105315 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-02 06:17:19 +00:00
Nate Begeman 22237771d8 Checkpoint arm_neon.h generation with tablegen 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105307 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-02 00:34:55 +00:00
Nate Begeman e8f0349439 Comment out some code in prep for actual .td file checkpoint. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104927 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-28 02:19:08 +00:00
Nate Begeman 5ddb087f7f Add support to tablegen for auto-generating arm_neon.h from a tablegen description 
of the intrinsics.  The goal is to auto-generate both support for GCC-style (vector)
and ARM-style (struct of vector) intrinsics.

This is work in progress, but will be completed soon.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104910 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-28 01:08:32 +00:00
Nate Begeman 1449f29100 Per chris's request, add some comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99434 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-24 22:19:06 +00:00
Nate Begeman fdea31a463 BUILD_VECTOR was missing out on some prime opportunities to use SSE 4.1 inserts. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99423 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-24 20:49:50 +00:00
Nate Begeman 75d5fe9213 Whoops this already existed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98297 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-11 23:21:19 +00:00
Nate Begeman 47a53a6e4c Add a handful of additional useful pass manager things to the C API 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98296 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-11 23:06:07 +00:00
Nate Begeman 7cdba6d1f4 Add a missing pattern for movhps so that we get: 
movq	(%ecx,%edx,2), %xmm2
movhps	(%ecx,%eax,2), %xmm2

rather than:

movq     (%eax, %edx, 2), %xmm2		
movq     (%eax, %ebx, 2), %xmm3		
movlhps  %xmm3, %xmm2			

Testcase forthcoming.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95948 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-12 01:10:45 +00:00
Nate Begeman 39bdc78e6f Kill the Mach-O writer, and temporarily make filetype=obj an error. 
The MCStreamer based assemblers will take over for this functionality.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95033 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-01 23:56:58 +00:00
Nate Begeman 60a17740b8 Remove this fixme, looking at the linker source, all targets pad to 4 bytes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93835 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-19 01:32:44 +00:00
Nate Begeman 6f24a0a603 Add a note for the macho streamer and remove a used of the mangler from the soon to be defunct machowriter pass. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93670 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-17 03:49:01 +00:00
Nate Begeman 3fe980b127 Hook up llc's -filetype=obj to use MCStreamer if an MCCodeEmitter is available. 
Remove most of old Mach-O Writer support, it has been replaced by MCMachOStreamer

Further refactoring to completely remove MachOWriter and drive the object file
writer with the AsmPrinter MCInst/MCSection logic is forthcoming.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93527 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-15 18:51:18 +00:00
Nate Begeman 93e0ed31c5 Don't pull vector sext through both hands of a logical operation, since doing so prevents the fusion of vector sext and setcc into vsetcc. 
Add a testcase for the above transformation.
Fix a bogus use of APInt noticed while tracking this down.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90423 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-03 07:11:29 +00:00
Nate Begeman 0b10b91465 x86 vector shuffle cleanup/fixes: 
1. rename the movhp patfrag to movlhps, since thats what it actually matches
2. eliminate the bogus movhps load and store patterns, they were incorrect.  The load transforms are already handled (correctly) by shufps/unpack.
3. revert a recent test change to its correct form.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86415 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-11-07 23:17:15 +00:00
Nate Begeman 8e46141e9e Add a couple more target nodes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85857 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-11-03 03:30:51 +00:00
Nate Begeman e4a9f9c450 Declare sin & cos as readonly so they match the code in SelectionDAGBuild 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85853 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-11-03 02:19:31 +00:00
Nate Begeman ed748a0677 PR 5245 - The imediate size target flag was not set on 3A-prefixed SSSE3 instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84506 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-19 17:31:16 +00:00
Nate Begeman a09008bf6d Add support for matching shuffle patterns with palignr. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84459 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-19 02:17:23 +00:00
Nate Begeman 677c89d8bf More heuristics for Combiner-AA. Still catches all important cases, but 
compile time penalty on gnugo, the worst case in MultiSource, is down to
about 2.5% from 30%


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83824 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-12 05:53:58 +00:00
Nate Begeman cc66cdd79c Fix combiner-aa issue with bases which are different, but can alias. 
Previously, it treated GV+28 GV+0 as different bases, and assumed they could
not alias.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82753 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-25 06:05:26 +00:00
Nate Begeman 206a357684 Do not try and sink a load whose chain result has more than one use, when 
trying to create RMW opportunities in the x86 backend.  This can cause a 
cycle to appear in the graph, since the other uses may eventually feed into
the TokenFactor we are sinking the load below.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81996 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-16 03:20:46 +00:00
Nate Begeman 40fe16fada Do not add the SVOffset to the Node CSE ID. The same pointer argument cannot have different 
SVOffsets.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81937 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-15 22:30:11 +00:00
Nate Begeman 101b25c028 Better solution for tracking both the original alignment of the access, and the current alignment based 
on the source value offset.  This avoids increasing the size of mem nodes. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81897 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-15 19:05:41 +00:00
Nate Begeman 71524d716a Remove incorrect CSE code from r81813. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81819 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-15 00:38:09 +00:00
Nate Begeman b6aef5c867 Substantially speed up combiner-aa in the following ways: 
1. Switch from an std::set to a SmallPtrSet for visited chain nodes.
2. Do not force the recursive flattening of token factor nodes, regardless of
   use count.
3. Immediately process newly created TokenFactor nodes.

Also, improve combiner-aa by teaching it that loads to non-overlapping offsets
of relatively aligned objects cannot alias.

These changes result in a >5x speedup for combiner-aa on most testcases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81816 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-15 00:18:30 +00:00
Nate Begeman 9cae7053c0 Teach the legalizer to propagate the original alignment of loads and store when 
it splits them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81815 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-15 00:14:28 +00:00
Nate Begeman e6798372ea Add an "original alignment" field to load and store nodes. This enables the 
DAG Combiner to disambiguate chains for loads and stores of types which are
 broken up by the Legalizer into smaller pieces.  


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81813 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-15 00:13:12 +00:00
Nate Begeman 55a961f075 Typo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77568 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-30 02:00:06 +00:00
Nate Begeman abc0199680 Adapt the x86 build_vector dagcombine to the current state of the legalizer. 
build vectors with i64 elements will only appear on 32b x86 before legalize.
Since vector widening occurs during legalize, and produces i64 build_vector 
elements, the dag combiner is never run on these before legalize splits them
into 32b elements.

Teach the build_vector dag combine in x86 back end to recognize consecutive 
loads producing the low part of the vector.

Convert the two uses of TLI's consecutive load recognizer to pass LoadSDNodes
since that was required implicitly.

Add a testcase for the transform.

Old:
	subl	$28, %esp
	movl	32(%esp), %eax
	movl	4(%eax), %ecx
	movl	%ecx, 4(%esp)
	movl	(%eax), %eax
	movl	%eax, (%esp)
	movaps	(%esp), %xmm0
	pmovzxwd	%xmm0, %xmm0
	movl	36(%esp), %eax
	movaps	%xmm0, (%eax)
	addl	$28, %esp
	ret

New:
	movl	4(%esp), %eax
	pmovzxwd	(%eax), %xmm0
	movl	8(%esp), %eax
	movaps	%xmm0, (%eax)
	ret




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72957 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-05 21:37:30 +00:00
Nate Begeman ec8eee2d3a Fix infinite recursion in the C++ code which handles movddup by making it unnecessary. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70425 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-29 22:47:44 +00:00
Nate Begeman a641575828 Update comment, replace theoretically impossible check with an assert. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70391 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-29 18:13:31 +00:00
Nate Begeman 5a5ca1519e Implement review feedback for vector shuffle work. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70372 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-29 05:20:52 +00:00
Nate Begeman 5f96943e01 Revert accidental testcase reduction 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70226 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-27 18:42:40 +00:00
Nate Begeman 9008ca6b6b 2nd attempt, fixing SSE4.1 issues and implementing feedback from duncan. 
PR2957

ISD::VECTOR_SHUFFLE now stores an array of integers representing the shuffle
mask internal to the node, rather than taking a BUILD_VECTOR of ConstantSDNodes
as the shuffle mask.  A value of -1 represents UNDEF.

In addition to eliminating the creation of illegal BUILD_VECTORS just to 
represent shuffle masks, we are better about canonicalizing the shuffle mask,
resulting in substantially better code for some classes of shuffles.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70225 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-27 18:41:29 +00:00
Nate Begeman b706d29f9c PR2957 
ISD::VECTOR_SHUFFLE now stores an array of integers representing the shuffle
mask internal to the node, rather than taking a BUILD_VECTOR of ConstantSDNodes
as the shuffle mask.  A value of -1 represents UNDEF.

In addition to eliminating the creation of illegal BUILD_VECTORS just to 
represent shuffle masks, we are better about canonicalizing the shuffle mask,
resulting in substantially better code for some classes of shuffles.

A clean up of x86 shuffle code, and some canonicalizing in DAGCombiner is next.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69952 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-24 03:42:54 +00:00
Nate Begeman 7cee81703d Add support to tablegen for naming the nodes themselves, not just the operands, 
in selectiondag patterns.  This is required for the upcoming shuffle_vector rewrite,
and as it turns out, cleans up a hack in the Alpha instruction info.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67286 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-03-19 05:21:56 +00:00
Nate Begeman 841c6a4345 Allow cross-process JIT to handle MachineRelocations of the ExternalSymbol 
variety.  For example, an i64 div might turn into a call to __divdi3 during
legalization.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66646 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-03-11 07:03:43 +00:00
Nate Begeman b9c6c9bfe4 Finish cross-process JIT work, and clean up previous work. 
1. When the JIT is asked to remove a function, updating it's
   mapping to 0, we invalidate any function stubs used only 
   by that function.  Now, also invalidate the JIT's mapping
   from the GV the stub pointed to, to the address of the GV.

2. When dlsym stubs for cross-process JIT are enabled, do not
   abort just because a named function cannot be found in the
   JIT's process.

3. Fix various assumptions about when it is ok to use the lazy
   resolver when non-lazy JITing is enabled.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66324 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-03-07 06:41:19 +00:00
Nate Begeman 50cd6fda9e When allocating stubs, keep track of which Functions are referencing the stub. 
This invalidates the stubs in the resolver map when they are no longer referenced,
and should the JIT memory manager ever pick up a deallocateStub interface, the
JIT could reclaim the memory for unused stubs as well.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66141 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-03-05 06:34:37 +00:00
Nate Begeman 66941988de Fix a thinko in the JIT where the address of a GV was only recorded in the map 
on failure to resolve it.
Do not abort on failure to resolve an external symbol when using dlsym stubs,
  since the symbol may not be in the JIT's address space.  Just use 0.
Allow dlsym stubs to differentiate between GlobalVars and Functions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66050 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-03-04 19:10:38 +00:00
Nate Begeman 0b82f77e66 Fix the calculation for how big the allocated stub needs to be. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65895 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-03-02 23:10:14 +00:00
Nate Begeman cbd88adea6 Fix a problem with DAGCombine on 64b targets where folding 
extracts + build_vector into a shuffle would fail, because the
type of the new build_vector would not be legal.  Try harder to
create a legal build_vector type.  Note: this will be totally 
irrelevant once vector_shuffle no longer takes a build_vector for
shuffle mask.

New:
_foo:
	xorps	%xmm0, %xmm0
	xorps	%xmm1, %xmm1
	subps	%xmm1, %xmm1
	mulps	%xmm0, %xmm1
	addps	%xmm0, %xmm1
	movaps	%xmm1, 0

Old:
_foo:
	xorps	%xmm0, %xmm0
	movss	%xmm0, %xmm1
	xorps	%xmm2, %xmm2
	unpcklps	%xmm1, %xmm2
	pshufd	$80, %xmm1, %xmm1
	unpcklps	%xmm1, %xmm2
	pslldq	$16, %xmm2
	pshufd	$57, %xmm2, %xmm1
	subps	%xmm0, %xmm1
	mulps	%xmm0, %xmm1
	addps	%xmm0, %xmm1
	movaps	%xmm1, 0



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65791 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-03-01 23:44:07 +00:00
Nate Begeman 932be21c08 Make this test use darwin targe triple, to avoid stack traffic on linux. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65312 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-23 09:03:06 +00:00
Nate Begeman b9a47b824f Generate better code for v8i16 shuffles on SSE2 
Generate better code for v16i8 shuffles on SSE2 (avoids stack)
Generate pshufb for v8i16 and v16i8 shuffles on SSSE3 where it is fewer uops.
Document the shuffle matching logic and add some FIXMEs for later further
  cleanups.
New tests that test the above.

Examples:

New:
_shuf2:
	pextrw	$7, %xmm0, %eax
	punpcklqdq	%xmm1, %xmm0
	pshuflw	$128, %xmm0, %xmm0
	pinsrw	$2, %eax, %xmm0

Old:
_shuf2:
	pextrw	$2, %xmm0, %eax
	pextrw	$7, %xmm0, %ecx
	pinsrw	$2, %ecx, %xmm0
	pinsrw	$3, %eax, %xmm0
	movd	%xmm1, %eax
	pinsrw	$4, %eax, %xmm0
	ret

=========

New:
_shuf4:
	punpcklqdq	%xmm1, %xmm0
	pshufb	LCPI1_0, %xmm0

Old:
_shuf4:
	pextrw	$3, %xmm0, %eax
	movsd	%xmm1, %xmm0
	pextrw	$3, %xmm1, %ecx
	pinsrw	$4, %ecx, %xmm0
	pinsrw	$5, %eax, %xmm0

========

New:
_shuf1:
	pushl	%ebx
	pushl	%edi
	pushl	%esi
	pextrw	$1, %xmm0, %eax
	rolw	$8, %ax
	movd	%xmm0, %ecx
	rolw	$8, %cx
	pextrw	$5, %xmm0, %edx
	pextrw	$4, %xmm0, %esi
	pextrw	$3, %xmm0, %edi
	pextrw	$2, %xmm0, %ebx
	movaps	%xmm0, %xmm1
	pinsrw	$0, %ecx, %xmm1
	pinsrw	$1, %eax, %xmm1
	rolw	$8, %bx
	pinsrw	$2, %ebx, %xmm1
	rolw	$8, %di
	pinsrw	$3, %edi, %xmm1
	rolw	$8, %si
	pinsrw	$4, %esi, %xmm1
	rolw	$8, %dx
	pinsrw	$5, %edx, %xmm1
	pextrw	$7, %xmm0, %eax
	rolw	$8, %ax
	movaps	%xmm1, %xmm0
	pinsrw	$7, %eax, %xmm0
	popl	%esi
	popl	%edi
	popl	%ebx
	ret

Old:
_shuf1:
	subl	$252, %esp
	movaps	%xmm0, (%esp)
	movaps	%xmm0, 16(%esp)
	movaps	%xmm0, 32(%esp)
	movaps	%xmm0, 48(%esp)
	movaps	%xmm0, 64(%esp)
	movaps	%xmm0, 80(%esp)
	movaps	%xmm0, 96(%esp)
	movaps	%xmm0, 224(%esp)
	movaps	%xmm0, 208(%esp)
	movaps	%xmm0, 192(%esp)
	movaps	%xmm0, 176(%esp)
	movaps	%xmm0, 160(%esp)
	movaps	%xmm0, 144(%esp)
	movaps	%xmm0, 128(%esp)
	movaps	%xmm0, 112(%esp)
	movzbl	14(%esp), %eax
	movd	%eax, %xmm1
	movzbl	22(%esp), %eax
	movd	%eax, %xmm2
	punpcklbw	%xmm1, %xmm2
	movzbl	42(%esp), %eax
	movd	%eax, %xmm1
	movzbl	50(%esp), %eax
	movd	%eax, %xmm3
	punpcklbw	%xmm1, %xmm3
	punpcklbw	%xmm2, %xmm3
	movzbl	77(%esp), %eax
	movd	%eax, %xmm1
	movzbl	84(%esp), %eax
	movd	%eax, %xmm2
	punpcklbw	%xmm1, %xmm2
	movzbl	104(%esp), %eax
	movd	%eax, %xmm1
	punpcklbw	%xmm1, %xmm0
	punpcklbw	%xmm2, %xmm0
	movaps	%xmm0, %xmm1
	punpcklbw	%xmm3, %xmm1
	movzbl	127(%esp), %eax
	movd	%eax, %xmm0
	movzbl	135(%esp), %eax
	movd	%eax, %xmm2
	punpcklbw	%xmm0, %xmm2
	movzbl	155(%esp), %eax
	movd	%eax, %xmm0
	movzbl	163(%esp), %eax
	movd	%eax, %xmm3
	punpcklbw	%xmm0, %xmm3
	punpcklbw	%xmm2, %xmm3
	movzbl	188(%esp), %eax
	movd	%eax, %xmm0
	movzbl	197(%esp), %eax
	movd	%eax, %xmm2
	punpcklbw	%xmm0, %xmm2
	movzbl	217(%esp), %eax
	movd	%eax, %xmm4
	movzbl	225(%esp), %eax
	movd	%eax, %xmm0
	punpcklbw	%xmm4, %xmm0
	punpcklbw	%xmm2, %xmm0
	punpcklbw	%xmm3, %xmm0
	punpcklbw	%xmm1, %xmm0
	addl	$252, %esp
	ret



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65311 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-23 08:49:38 +00:00
Nate Begeman d6b7a242d3 Add support to the JIT for true non-lazy operation. When a call to a function 
that has not been JIT'd yet, the callee is put on a list of pending functions
to JIT.  The call is directed through a stub, which is updated with the address
of the function after it has been JIT'd.  A new interface for allocating and
updating empty stubs is provided.

Add support for removing the ModuleProvider the JIT was created with, which
would otherwise invalidate the JIT's PassManager, which is initialized with the
ModuleProvider's Module.

Add support under a new ExecutionEngine flag for emitting the infomration 
necessary to update Function and GlobalVariable stubs after JITing them, by
recording the address of the stub and the name of the GlobalValue.  This allows
code to be copied from one address space to another, where libraries may live
at different virtual addresses, and have the stubs updated with their new
correct target addresses.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64906 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-18 08:31:02 +00:00
Nate Begeman 0f123cf732 Add suppport for ConstantExprs of shufflevectors whose result type is not equal to the 
type of the vectors being shuffled.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64401 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-12 21:28:33 +00:00
Nate Begeman 7b25467d06 the two non-mask arguments to a shufflevector must be the same width, but they do not have to be the same 
width as the result value.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64335 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-11 22:36:25 +00:00
Nate Begeman 0091cf92c6 Remove now-incorrect test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63772 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-04 21:07:37 +00:00
Nate Begeman d24479730a New feature: add support for target intrinsics being defined in the 
target directories themselves.  This also means that VMCore no longer
needs to know about every target's list of intrinsics.  Future work
will include converting the PowerPC target to this interface as an
example implementation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63765 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-04 19:47:21 +00:00
Nate Begeman 5bf4b7556f Fix a typo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62989 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-26 03:15:54 +00:00
Nate Begeman c2fd67f697 De-identifying per sabre review 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62988 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-26 03:15:31 +00:00
Nate Begeman 34509841e7 Add some documentation for address-space-based access to the segment registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62986 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-26 02:54:45 +00:00
Nate Begeman 51a0437b16 Map address space 256 to gs; similar mappings could be supported for the 
other x86 segments.  address space 0 is stack/default, 1-255 are reserved for
client use.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62980 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-26 01:24:32 +00:00
Nate Begeman 740ab03f12 Support pattern matching various x86 sse shifts. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62979 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-26 00:52:55 +00:00
Nate Begeman 9b99485074 Fix an indent and a typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62940 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-24 22:12:48 +00:00
Nate Begeman 60789e419e Add support for deleting a module provider from a JIT in such a way that it does not cause the owned module to be fully materialized. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62864 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-23 19:27:28 +00:00
Nate Begeman 110e3b3d1b Fix PEXTRQ encoding 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58403 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-10-29 23:07:17 +00:00
Nate Begeman 1db3c92306 Implement ISD::TRAP support on PPC 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54644 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-08-11 17:36:31 +00:00
Nate Begeman 24dc346a16 Fix broken CellSPU lowering, re-instate braces in Legalize 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54168 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-07-29 19:07:27 +00:00
Nate Begeman f09d131126 Disable a fix in the previous patch, since it breaks CellSPU. 
The CellSPU codegen is broken, but needs to be fixed before we can
put this back in.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54164 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-07-29 18:28:31 +00:00