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3 Commits

Author SHA1 Message Date
NAKAMURA Takumi
6c921a55f4 Rework r183728, suppress assert(0) for now. Its behavior depends on assertions on win32 hosts. 
FIXME: Introduce yet another checker but assert(0).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183736 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-06-11 10:01:42 +00:00
NAKAMURA Takumi
c139672407 Tweak a couple of tests on win32 hosts with +Asserts. 
- Don't use assert(0), or tests may pass or fail according to assertions.
  - For now, The tests are marked as XFAIL for win32 hosts.

FIXME: Could we avoid XFAIL to specify triple in the RUN lines?

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183728 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-06-11 06:52:58 +00:00
Tim Northover
9bdd785014 ARM: diagnose ARM/Thumb assembly switches on CPUs only supporting one. 
Some ARM CPUs only support ARM mode (ancient v4 ones, for example) and some
only support Thumb mode (M-class ones currently). This makes sure such CPUs
default to the correct mode and makes the AsmParser diagnose an attempt to
switch modes incorrectly.

rdar://14024354

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183710 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-06-10 23:20:58 +00:00