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3889a2cb05c36f30050941679d5fd55d45e6a3ed
Commit Graph
17 Commits
Author SHA1 Message Date
Chris Lattner 3889a2cb05 Remove a ton of extraneous #includes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6842 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-06-22 03:08:05 +00:00
Chris Lattner 09d4fd57de Add new getName method 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5212 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-01-13 00:19:44 +00:00
Chris Lattner f9b332b59d * Keep track of register alignment as well as register size 
* Add comments
* Add a new allocation_order iterator for register classes which targets may
  use to control the register order and available registers based on properties
  of the function being compiled.
* Remove access to FP and SP registers
* Add new callframe setup opcode support
* Eliminate moveImm2Reg method
* Revamp frame offset handling and prolog/epilog code generation


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5167 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-28 20:10:23 +00:00
Chris Lattner 8c5d47da98 Simplify spill interface methods 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5142 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-25 05:02:00 +00:00
Chris Lattner 8797caac84 Simplify interface to remove virtual function references 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5100 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-17 04:20:39 +00:00
Chris Lattner 00032bf6cc Add support for register alias set description 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5080 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-16 16:39:14 +00:00
Chris Lattner 198ab640bb Simplify interfaces used by regalloc to insert code 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5052 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-15 20:06:35 +00:00
Chris Lattner 0f24e33b73 Simplify TargetRegisterClass a bit, also eliminating virtual function call 
overhead


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5049 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-15 19:29:14 +00:00
Chris Lattner aa8dad5561 * Rename const_regclass_begin/end to just regclass_begin/end 
* Regclass iterators need an extra level of pointerness to work right
* Pull inverse mapping code out of target description files


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5046 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-15 18:40:01 +00:00
Misha Brukman 2b46e8eccc Added moveReg2Reg() and moveImm2Reg() to accomodate moving data around due to 
PHI nodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5001 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-13 09:54:12 +00:00
Misha Brukman 9da4d263b9 Added prototypes for emitting prologue and epilogue for function code 
generation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4927 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-04 23:55:56 +00:00
Misha Brukman a361c8417b storeReg2RegOffset() and loadRegOffset2Reg() now take the iterator by value 
instead of by reference, since they return the modified iterator.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4914 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-04 17:14:13 +00:00
Misha Brukman 0af0d5bd3e Moved buildReg2RegClassMap() into from X86RegisterInfo to MRegisterInfo, since 
it is target-independent.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4911 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-04 16:47:04 +00:00
Misha Brukman 44662a783b RegisterInfo now supports handing out caller- and callee-save registers, as 
well as building a map from a physical register to its register class.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4896 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-03 23:09:53 +00:00
Misha Brukman f6a132c7a0 Added virtual functions for storing and retrieving values from the stack. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4824 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-22 22:41:23 +00:00
Misha Brukman 282ec57c4c MRegisterInfo.h - Added prototypes for functions we need to map a register to 
an appropriate TargetRegisterClass, also adds TargetRegisterClass definition.
TargetMachine.h - speling.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4781 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-20 18:54:53 +00:00
Chris Lattner 3d7771a387 Initial checkin of target support for X86 backend. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4287 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-10-25 23:00:40 +00:00