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8094 Commits

Author SHA1 Message Date
Dan Gohman
3ce990dc05 When we start enabling SMUL_LOHI/UMUL_LOHI or SDIVREM/UDIVREM in 
target-indepenent lowering, don't use them on PowerPC.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42755 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-08 17:28:24 +00:00
Dan Gohman
8e41ed7c4e Simplify getIntPtrType, allowing it to work for arbitrary pointer sizes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42751 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-08 15:16:25 +00:00
Chris Lattner
f443ba7f97 disable this entirely: it is causing use of invalidated iterators and infinite looping. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42739 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-07 22:00:31 +00:00
Chris Lattner
eac9385f09 Fix many regressions on x86 by avoiding dereferencing the end iterator. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42738 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-07 21:53:12 +00:00
Anton Korobeynikov
2508372746 Oops, I really wanted to commit this part also :) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42700 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-06 16:39:43 +00:00
Anton Korobeynikov
4f1c33f7c8 Move merge code into new helper function. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42699 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-06 16:17:49 +00:00
Evan Cheng
c231e8c8a5 Added DAG xforms. e.g. 
(vextract (v4f32 s2v (f32 load $addr)), 0) -> (f32 load $addr) 
(vextract (v4i32 bc (v4f32 s2v (f32 load $addr))), 0) -> (i32 load $addr)
Remove x86 specific patterns.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42677 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-06 02:46:29 +00:00
Dale Johannesen
638ccd52b9 Next powerpc long double bits. Comparisons work, 
although not well, and shortening FP converts.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42672 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-06 01:24:11 +00:00
Evan Cheng
7ad42d9ec0 Commute x86 cmove instructions by swapping the operands and change the condition 
to its inverse.
Testing this as llcbeta


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42661 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-05 23:13:21 +00:00
Evan Cheng
57cce6c466 This is done. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42656 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-05 22:34:59 +00:00
Evan Cheng
ecf80ac68a Enable convertToThreeAddress for X86 by default. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42655 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-05 22:31:10 +00:00
Evan Cheng
b75ed322c4 INC64_32r -> LEA64_32r is better than INC64_32r -> LEA32r, but it still can 
cause performance degradation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42653 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-05 21:55:32 +00:00
Evan Cheng
559dc46d46 In 64-bit mode, avoid using leal with 32-bit 32-bit address size, e.g. 
leal 1(%ecx), %edi, which requires 67H prefix.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42647 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-05 20:34:26 +00:00
Dale Johannesen
161e897b0f First round of ppc long double. call/return and 
basic arithmetic works.
Rename RTLIB long double functions to distinguish
different flavors of long double; the lib functions
have different names, alas.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42644 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-05 20:04:43 +00:00
Evan Cheng
b952d1f5be Add support to convert more 64-bit instructions to 3-address instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42642 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-05 18:20:36 +00:00
Evan Cheng
3154cb67d1 ADC and SBB uses EFLAGS. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42640 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-05 17:59:57 +00:00
Dan Gohman
52c0253f04 Change a few more spaces to tabs in assembly output. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42638 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-05 15:58:41 +00:00
Dan Gohman
4e8e831a4e Change a space to a tab in the assembly output of a .globl directive 
for consistency.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42637 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-05 15:54:58 +00:00
Evan Cheng
3f411c7627 Testing convertToThreeeAddress as X86 llcbeta. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42630 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-05 08:04:01 +00:00
Evan Cheng
75b4e46b8a Added storeRegToAddr, loadRegFromAddr, and unfoldMemoryOperand's. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42624 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-05 01:34:55 +00:00
Evan Cheng
afa98bcf3d Not needed any more. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42623 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-05 01:34:14 +00:00
Evan Cheng
e203ae9971 Forgot these. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42622 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-05 01:33:45 +00:00
Evan Cheng
66f0f64082 - Added a few target hooks to generate load / store instructions from / to any 
address (not just from / to frameindexes).
- Added target hooks to unfold load / store instructions / SDNodes into separate
load, data processing, store instructions / SDNodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42621 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-05 01:32:41 +00:00
Chris Lattner
87b77b9079 add a note. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42607 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-04 15:47:27 +00:00
Dan Gohman
cb406c2597 Use empty() member functions when that's what's being tested for instead 
of comparing begin() and end().


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42585 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-03 19:26:29 +00:00
Chris Lattner
fce5cfe190 add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42579 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-03 17:10:03 +00:00
Chris Lattner
e1bb6ab7b0 add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42573 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-03 06:10:59 +00:00
Chris Lattner
67a1af9709 Bill's example is still not enough to repro this, but it has other issues that 
seem significant as well.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42564 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-03 03:40:24 +00:00
Bill Wendling
7687bd0b2b Another micro-opt. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42554 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-02 21:49:31 +00:00
Bill Wendling
2bb6d459e6 Another missed optimization with LICM. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42552 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-02 21:43:06 +00:00
Bill Wendling
892d392905 Small label changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42549 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-02 21:02:53 +00:00
Bill Wendling
6dbb1b59ae Now with source code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42548 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-02 21:01:16 +00:00
Bill Wendling
8d1c8ce3d8 Now with LL code! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42547 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-02 20:54:32 +00:00
Bill Wendling
6aab4910cd Another missed optimization. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42546 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-02 20:42:59 +00:00
Bill Wendling
c720279ac7 Micro-optimization -- missed LICM opportunity. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42542 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-02 19:55:05 +00:00
Dale Johannesen
9ab7fb3ba4 Rewrite sqrt and powi to use anyfloat. By popular demand. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42537 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-02 17:43:59 +00:00
Evan Cheng
7f3394f379 Refactor code to add load / store folded instructions -> register only 
instructions reverse map.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42509 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-01 23:44:33 +00:00
Evan Cheng
fef922a4d5 Typo. X86comi doesn't read / write chain's. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42492 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-01 18:12:48 +00:00
Dale Johannesen
3b5b4cd1a5 Add getABITypeSize, getABITypeSizeInBits 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42488 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-01 16:03:14 +00:00
Gordon Henriksen
cd8bc05102 AsmPrinters overriding getAnalysisUsage should call super. 
And not super's super, either.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42482 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-30 13:39:29 +00:00
Evan Cheng
e5f6204cd5 Enabling new condition code modeling scheme. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42459 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-29 00:00:36 +00:00
Rafael Espindola
068317bfa3 Refactor the memcpy lowering for the x86 target. 
The only generated code difference is that now we call memcpy when
the size of the array is unknown. This matches GCC behavior and is
better since the run time value can be arbitrarily large.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42433 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-28 12:53:01 +00:00
Evan Cheng
fa00feb7f8 Stop inventing new words. :-) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42429 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-28 01:35:02 +00:00
Evan Cheng
8decf6bc18 Pessimisively assume ADJCALLSTACKDOWN / ADJCALLSTACKUP (which becomes sub / add) clobbers EFLAGS. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42426 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-28 01:19:48 +00:00
Dan Gohman
82482944ed TargetAsmInfo::getAddressSize() was incorrect for x86-64 and 64-bit targets 
other than PPC64. Instead of fixing it, just remove it and fix all the
places that use it to use TargetData::getPointerSize() instead, as there
aren't very many. Most of the references were in DwarfWriter.cpp.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42419 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-27 23:12:31 +00:00
Evan Cheng
3f2d9ec186 Use GR64 in 64-bit mode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42417 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-27 21:50:05 +00:00
Evan Cheng
1ed37fdb3b Doh. Calls clobber EFLAGS. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42413 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-27 19:01:55 +00:00
Dale Johannesen
693717fbe6 Make temporaries explicit to avoid premature 
destruction of compiler-created ones.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42383 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-26 23:20:33 +00:00
Evan Cheng
42d60274ea - Move getPhysicalRegisterRegClass() from ScheduleDAG to MRegisterInfo. 
- Added ability to emit cross class register copies to the BBRU scheduler.
- More aggressive backtracking.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42375 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-26 21:36:17 +00:00
Evan Cheng
ff11026575 - Added MRegisterInfo::getCrossCopyRegClass() hook. For register classes where reg to reg copies are not possible, this returns another register class which registers in the specified register class can be copied to (and copy back from). 
- X86 copyRegToReg() now supports copying between EFLAGS and GR32 / GR64 registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42372 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-26 21:31:07 +00:00