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56 Commits

Author SHA1 Message Date
Evan Cheng
144fd1ff0f Set ARM ifcvt duplication limit to 3 for now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37385 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-06-01 08:28:59 +00:00
Evan Cheng
e5e7ce458a Silence some compilation warnings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37197 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-18 01:19:57 +00:00
Evan Cheng
9f8cbd147c Set ARM if-conversion block size threshold to 10 instructions for now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37194 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-18 00:19:34 +00:00
Dale Johannesen
8dd86c14d4 More effective breakdown of memcpy into repeated load/store. These are now 
in the order lod;lod;lod;sto;sto;sto which means the load-store optimizer
has a better chance of producing ldm/stm.  Ideally you would get cooperation
from the RA as well but this is not there yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37179 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-17 21:31:21 +00:00
Lauro Ramos Venancio
5d3d44a848 Fix previous patch. GOTOFF can be used only when the symbol has internal 
linkage or hidden visibility.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37055 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-14 23:20:21 +00:00
Lauro Ramos Venancio
930d161ba2 Optimize PIC implementation. GOTOFF can be used when the symbol is defined 
and used in the same module.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37044 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-14 18:46:23 +00:00
Evan Cheng
97c9bb5cc6 On Mac OS X, GV requires an extra load only when relocation-model is non-static. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36718 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-04 00:26:58 +00:00
Lauro Ramos Venancio
e8e5495474 Debug support for arm-linux. 
Patch by Raul Herbster.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36690 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-03 20:28:35 +00:00
Evan Cheng
0b0a9a90a4 Typo. It's checking if V is multiple of 4, not multiple of 3. :-) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36663 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-03 02:00:18 +00:00
Lauro Ramos Venancio
64f4fa5e0e ARM TLS: implement "general dynamic", "initial exec" and "local exec" models. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36506 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-27 13:54:47 +00:00
Evan Cheng
b1df8f2750 Darwin runtime library does not have these. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36505 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-27 08:15:43 +00:00
Lauro Ramos Venancio
0ae4a3357a Implement PIC for arm-linux. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36324 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-22 00:04:12 +00:00
Chris Lattner
5a3d40d88f arm has r+r*s and r+i addr modes, but no r+i+r*s addr modes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35962 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-13 06:50:55 +00:00
Chris Lattner
e11529438c Fix incorrect fall-throughs in addr mode code. This fixes CodeGen/ARM/arm-negative-stride.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35909 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-11 16:17:12 +00:00
Chris Lattner
eb13d1b710 restore support for negative strides 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35859 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-10 03:48:29 +00:00
Chris Lattner
37caf8c68e remove dead target hooks 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35846 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-09 23:33:39 +00:00
Chris Lattner
b445d0cbb9 remove some dead target hooks, subsumed by isLegalAddressingMode 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35840 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-09 22:27:04 +00:00
Evan Cheng
0a7baa24d1 Typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35639 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-04 00:06:07 +00:00
Chris Lattner
b2c594f350 Arm supports negative strides as well, add them. This lets us compile: 
CodeGen/ARM/arm-negative-stride.ll to:

LBB1_2: @bb
        str r1, [r3, -r0, lsl #2]
        add r0, r0, #1
        cmp r0, r2
        bne LBB1_2      @bb


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35609 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-03 00:13:57 +00:00
Chris Lattner
6e0784da77 fix the CodeGen/ARM/2007-03-13-InstrSched.ll regression: allow IV's with scales 
to be folded into non-store instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35601 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-02 18:51:18 +00:00
Chris Lattner
c4e3f8e736 add support for the 'w' inline asm register class. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35598 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-02 17:24:08 +00:00
Lauro Ramos Venancio
9996663fc6 - Divides the comparisons in two types: comparisons that only use N and Z 
flags (ARMISD::CMPNZ) and comparisons that use all flags (ARMISD::CMP).
- Defines the instructions: TST, TEQ (ARM) and TST (Thumb).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35573 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-02 01:30:03 +00:00
Evan Cheng
3074d9df96 Add i16 address mode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35551 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-01 08:06:46 +00:00
Chris Lattner
c9addb7488 implement the new addressing mode description hook. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35521 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-30 23:15:24 +00:00
Evan Cheng
caaf69107e Remove isLegalAddressImmediate. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35406 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-28 01:53:55 +00:00
Lauro Ramos Venancio
b8a93a45f8 bugfix: sometimes the spiller puts a load between the "mov lr, pc" and "bx" of a CALL_NOLINK. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35381 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-27 16:19:21 +00:00
Chris Lattner
4234f57fa0 switch TargetLowering::getConstraintType to take the entire constraint, 
not just the first letter.  No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35322 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-25 02:14:49 +00:00
Dale Johannesen
fa4bce2b76 repair x86 performance, dejagnu problems from previous change 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35245 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-21 21:51:52 +00:00
Dale Johannesen
8e59e163db do not share old induction variables when this would result in invalid 
instructions (that would have to be split later)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35227 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-20 21:54:54 +00:00
Lauro Ramos Venancio
64c88d741e bugfix: When the source register of CALL_NOLINK was LR, the following code was emitted: 
mov lr, pc
    bx lr
So, the function was not called.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35218 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-20 17:57:23 +00:00
Chris Lattner
1719e13da0 fix indentation 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35202 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-20 02:25:53 +00:00
Evan Cheng
9f6636ff0c Fix naming inconsistencies. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35163 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-19 07:48:02 +00:00
Lauro Ramos Venancio
368f20fda4 Only ARMv6 has BSWAP. 
Fix MultiSource/Applications/aha test.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35128 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-16 22:54:16 +00:00
Evan Cheng
2770747216 Added isLegalAddressExpression(). Only allows X +/- C for now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35122 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-16 08:43:56 +00:00
Evan Cheng
961f879ed8 Zero is always a legal AM immediate. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35087 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-13 20:37:59 +00:00
Evan Cheng
b01fad6d19 Updated TargetLowering LSR addressing mode hooks for ARM and Thumb. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35075 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-12 23:30:29 +00:00
Evan Cheng
b582b1b1fc Fix a typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35030 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-08 21:59:30 +00:00
Anton Korobeynikov
d0b82b301d Refactoring of formal parameter flags. Enable properly use of 
zext/sext/aext stuff.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35008 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-07 16:25:09 +00:00
Anton Korobeynikov
1d9baccc9b Use new SDIselParamAttr enumeration. This removes "magick" constants 
from formal attributes' flags processing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34963 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-06 08:12:33 +00:00
Lauro Ramos Venancio
600c383e5c Fix stack alignment in functions with varargs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34532 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-23 20:32:57 +00:00
Jim Laskey
2ad9f17fee Simplify lowering and selection of exception ops. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34488 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-22 14:56:36 +00:00
Jim Laskey
62819f3144 Support to provide exception and selector registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34482 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-21 22:54:50 +00:00
Lauro Ramos Venancio
876eaf1135 According to ARM EABI, 8-bytes function arguments must be 8-bytes aligned. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34241 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-13 14:07:13 +00:00
Evan Cheng
fc4034259f Fix comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33831 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-03 08:53:01 +00:00
Evan Cheng
9a2ef9509e Fix a bug in getARMCMP (which translate CondCode to ARM specific CC) when the RHS is a constant. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33775 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-02 01:53:26 +00:00
Evan Cheng
b0636156ef Thumb does not have clz. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33773 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-01 23:34:03 +00:00
Evan Cheng
193f850880 Specify the right CC for comparison libcalls. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33702 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-31 09:30:58 +00:00
Evan Cheng
b6ab2547cb Observe -soft-float. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33699 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-31 08:40:13 +00:00
Evan Cheng
c60e76d139 - Fix codegen for pc relative constant (e.g. JT) in thumb mode: 
.set PCRELV0, (LJTI1_0_0-(LPCRELL0+4))
LPCRELL0:
        add r1, pc, #PCRELV0
This is not legal since add r1, pc, #c requires the constant be a multiple of 4.
Do the following instead:
        .set PCRELV0, (LJTI1_0_0-(LPCRELL0+4))
LPCRELL0:
        mov r1, #PCRELV0
        add r1, pc

- In thumb mode, it's not possible to use .set generate a pc relative stub
  address. The stub is ARM code which is in a different section from the thumb
  code. Load the value from a constpool instead.
- Some asm printing clean up.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33664 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-30 20:37:08 +00:00
Reid Spencer
5cbf985dcb For PR1136: Rename GlobalVariable::isExternal as isDeclaration to avoid 
confusion with external linkage types.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33663 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-30 20:08:39 +00:00