104713 Commits

Author SHA1 Message Date
Zachary Turner
4031acb4cd Clean up some unnecessary mutex guards.
These were being used as unreferenced parameters to enforce that
the methods must not be called without holding a mutex, but all
of the methods in question were internal, and the methods were
only exposed through an interface whose entire purpose was to
serialize access to these structures, so expecting the methods
to be accessed under a mutex is reasonable enough.

Reviewed by: blaikie

Differential Revision: http://reviews.llvm.org/D4162

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211054 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-16 20:54:28 +00:00
Louis Gerbarg
163eb0990c Improve comments for r211040
Added comment to clarify why we r211040 choose to bail out of fast isel instead
of generating a more complicated relocation, and fix mislabelled register in the
comments of the asan test case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211052 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-16 20:31:50 +00:00
Hans Wennborg
baf9879290 Revert "lit: warn when passed invalid pathname" (r210597)
It was pointed out that this breaks the "virtual test discovery"
mechanism, which allows for narming tests in the test exec root.

Reverting until I can figure out how to fix this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211048 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-16 20:18:41 +00:00
Tim Northover
73b142e656 ARM: implement correct atomic operations on v7M
ARM v7M has ldrex/strex but not ldrexd/strexd. This means 32-bit
operations should work as normal, but 64-bit ones are almost certainly
doomed.

Patch by Phoebe Buckheister.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211042 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-16 18:49:36 +00:00
Louis Gerbarg
a564159d85 Fix illegal relocations in X86FastISel
On x86_86  the lea instruction can only use a 32 bit immediate value. When
the code is compiled statically the RIP register is not used, meaning the
immediate is all that can be used for the relocation, which is not sufficient
in the case of targets more than +/- 2GB away. This patch bails out of fast
isel in those cases and reverts to DAG which does the right thing.

Test case included.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211040 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-16 17:35:40 +00:00
Jim Grosbach
dc2dc390f6 LowerSwitch: track bounding range for the condition tree.
When LowerSwitch transforms a switch instruction into a tree of ifs it
is actually performing a binary search into the various case ranges, to
see if the current value falls into one cases range of values.

So, if we have a program with something like this:

switch (a) {
case 0:
  do0();
  break;
case 1:
  do1();
  break;
case 2:
  do2();
  break;
default:
  break;
}

the code produced is something like this:

  if (a < 1) {
    if (a == 0) {
      do0();
    }
  } else {
    if (a < 2) {
      if (a == 1) {
        do1();
      }
    } else {
      if (a == 2) {
        do2();
      }
    }
  }

This code is inefficient because the check (a == 1) to execute do1() is
not needed.

The reason is that because we already checked that (a >= 1) initially by
checking that also  (a < 2) we basically already inferred that (a == 1)
without the need of an extra basic block spawned to check if actually (a
== 1).

The patch addresses this problem by keeping track of already
checked bounds in the LowerSwitch algorithm, so that when the time
arrives to produce a Leaf Block that checks the equality with the case
value / range the algorithm can decide if that block is really needed
depending on the already checked bounds .

For example, the above with "a = 1" would work like this:

the bounds start as LB: NONE , UB: NONE
as (a < 1) is emitted the bounds for the else path become LB: 1 UB:
NONE. This happens because by failing the test (a < 1) we know that the
value "a" cannot be smaller than 1 if we enter the else branch.
After the emitting the check (a < 2) the bounds in the if branch become
LB: 1 UB: 1. This is because by checking that "a" is smaller than 2 then
the upper bound becomes 2 - 1 = 1.

When it is time to emit the leaf block for "case 1:" we notice that 1
can be squeezed exactly in between the LB and UB, which means that if we
arrived to that block there is no need to emit a block that checks if (a
== 1).

Patch by: Marcello Maggioni <hayarms@gmail.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211038 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-16 16:55:20 +00:00
James Molloy
408519765b Refactor the disabling of Thumb-1 LDM/STM generation
Originally I switched the LD/ST optimizer off in TargetMachine as it was previously, but Eric has suggested he'd prefer that it be short-circuited in the pass itself.

No functionality change.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211037 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-16 16:42:53 +00:00
Rafael Espindola
7f2f94faeb Fix pr17056.
This makes llvm-nm ignore members that are not sufficiently aligned for
lib/Object to handle.

These archives are invalid. GNU AR is able to handle this, but in general
just warns about broken archive members.

We should probably start warning too, but for now just make sure llvm-nm
exits with an 0.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211036 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-16 16:41:00 +00:00
Rafael Espindola
0659928fec Convert the Archive API to use ErrorOr.
Now that we have c++11, even things like ErrorOr<std::unique_ptr<...>> are
easy to use.

No intended functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211033 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-16 16:08:36 +00:00
Tilmann Scheller
d492c19894 [AArch64] Remove dead code.
Both function declarations lack a callee and an implementation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211029 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-16 15:15:41 +00:00
Cameron McInally
5d57928a32 Hook up vector int_ctlz for AVX512.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211024 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-16 14:12:28 +00:00
Daniel Sanders
dfcd461d62 [mips][mips64r6] ssnop is deprecated on MIPS32r6/MIPS64r6
Summary: Depends on D4120

Reviewers: jkolek, zoran.jovanovic, vmedic

Reviewed By: zoran.jovanovic, vmedic

Differential Revision: http://reviews.llvm.org/D4121

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211021 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-16 13:25:35 +00:00
Daniel Sanders
77ae274ae7 [mips][mips64r6] cl[oz], and dcl[oz] are re-encoded in MIPS32r6/MIPS64r6
Summary:
There is no change to the restrictions, just the result register is stored
once in the encoding rather than twice. The rt field is zero in
MIPS32r6/MIPS64r6.

Depends on D4119

Reviewers: zoran.jovanovic, jkolek, vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D4120

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211019 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-16 13:18:59 +00:00
Daniel Sanders
af0d72a6f9 [mips][mips64r6] ll, sc, lld, and scd are re-encoded on MIPS32r6/MIPS64r6.
Summary:
The linked-load, store-conditional operations have been re-encoded such
that have a 9-bit offset instead of the 16-bit offset they have prior to
MIPS32r6/MIPS64r6.

While implementing this, I noticed that the atomic load/store pseudos always
emit a sign extension using sll and sra. I have improved this to use seb/seh
when they are available (MIPS32r2/MIPS64r2 and above).

Depends on D4118

Reviewers: jkolek, zoran.jovanovic, vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D4119

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211018 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-16 13:13:03 +00:00
Dmitri Gribenko
438c85b50e Support/ConvertUTF: restore compatibility with MSVC, which only implements C89
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211016 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-16 11:22:33 +00:00
Dmitri Gribenko
9becc6c2af Support/ConvertUTF: implement U+FFFD insertion according to the recommendation
given in the Unicode spec

That is, replace every maximal subpart of an ill-formed subsequence with one
U+FFFD.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211015 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-16 11:09:46 +00:00
James Molloy
b3820b4289 [AArch64] Fix a fencepost error in lowering for llvm.aarch64.neon.uqshl.
Patch by Jiangning Liu!



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211014 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-16 10:39:21 +00:00
Daniel Sanders
b0e4096481 [mips] Merge most of the big/little endian checks in atomic.ll
Summary:
There is very little difference between the big and little endian cases in
test/CodeGen/Mips/atomic.ll. Merge them together using multiple
FileCheck prefixes.

Depends on D4117

Reviewers: jkolek, zoran.jovanovic, vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D4118

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211013 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-16 10:25:17 +00:00
Daniel Sanders
5ee24f37af [mips][mips64r6] [ls][wd]c2 were re-encoded with 11-bit signed immediates rather than 16-bit in MIPS32r6/MIPS64r6
Summary:
The error message for the invalid.s cases isn't very helpful. It happens because
there is an instruction with a wider immediate that would have matched if the
NotMips32r6 predicate were true. I have some WIP to improve the message but it
affects most error messages for removed/re-encoded instructions on
MIPS32r6/MIPS64r6 and should therefore be a separate commit.

Depens on D4115

Reviewers: zoran.jovanovic, jkolek, vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D4117

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211012 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-16 10:00:45 +00:00
Christian Pirker
467e6ad2e5 ARMEB: Fix trunc store for vector types
Reviewed at http://reviews.llvm.org/D4135



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211010 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-16 09:17:30 +00:00
Jingyue Wu
f6eb7e3175 Canonicalize addrspacecast ConstExpr between different pointer types
As a follow-up to r210375 which canonicalizes addrspacecast
instructions, this patch canonicalizes addrspacecast constant
expressions.

Given clang uses ConstantExpr::getAddrSpaceCast to emit addrspacecast
cosntant expressions, this patch is also a step towards having the
frontend emit canonicalized addrspacecasts.

Piggyback a minor refactor in InstCombineCasts.cpp

Update three affected tests in addrspacecast-alias.ll,
access-non-generic.ll and constant-fold-gep.ll and added one new test in
constant-fold-address-space-pointer.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211004 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-15 21:40:57 +00:00
Matt Arsenault
f9ef37a986 Fix copy paste error
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211003 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-15 21:22:52 +00:00
Matt Arsenault
3c11f69001 R600: Add a rotr testcase I forgot to add
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211002 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-15 21:09:00 +00:00
Matt Arsenault
fa848ccd09 R600: Remove a few more things from AMDILISelLowering
Try to keep all the setOperationActions for integer ops
together.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211001 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-15 21:08:58 +00:00
Matt Arsenault
e2480a202f R600: Fix assert on vector sdiv
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211000 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-15 21:08:54 +00:00
Matt Arsenault
62f6ab7a6d R600: Move / cleanup more leftover AMDIL stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210998 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-15 20:23:38 +00:00
Matt Arsenault
57177e3361 R600: Move division custom lowering out of AMDILISelLowering
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210997 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-15 20:08:02 +00:00
Eric Christopher
47d34abdb0 Temporarily revert r210953 in an attempt to bring the ARM buildbots
back.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210996 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-15 19:55:14 +00:00
Matt Arsenault
61bfbc4d96 R600: Report that integer division is expensive.
Divides by weird constants now emit much better code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210995 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-15 19:48:16 +00:00
Matt Arsenault
36b9c7c872 R600: Remove dead code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210994 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-15 19:48:13 +00:00
David Blaikie
5379c6930d PR20038: DebugInfo missing DIEs for some concrete variables.
I haven't nailed this down entirely, but this is about as small of a
test case as I can seem to construct and adequately demonstrates the
crasher. I'll continue investigating the root cause/fix(es).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210993 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-15 19:34:26 +00:00
Manuel Klimek
cc3f31aec5 Add specialization of FoldingSetTrait for std::pair.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210990 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-15 14:42:25 +00:00
Tim Northover
40ed1d89b1 LegalizeDAG: make sure cast is unsigned before using FP_TO_UINT.
It's valid to use FP_TO_SINT when asking for a smaller type (e.g. all
"unsigned int16" values fit into a "signed int32"), but the reverse
isn't true.

Unfortunately, I'm not actually aware of any architecture with
asymmetric FP_TO_SINT and FP_TO_UINT handling and the logic happens to
work in the symmetric case, so I can't actually write a test for this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210986 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-15 09:27:20 +00:00
Tim Northover
8bfc50e4a9 AArch64: improve handling & modelling of FP_TO_XINT nodes.
There's probably no acatual change in behaviour here, just updating
the LowerFP_TO_INT function to be more similar to the reverse
implementation and updating costs to current CodeGen.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210985 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-15 09:27:15 +00:00
Tim Northover
94fe5c1fe2 AArch64: improve vector [su]itofp handling.
This somehow got missed in the AArch64 merge, so should fix a
performance regression since 3.4.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210984 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-15 09:27:06 +00:00
NAKAMURA Takumi
e12d893d7a Don't expect tests always crashing. Add "REQUIRES:asserts".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210983 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-15 01:01:11 +00:00
Artyom Skrobov
f6b4b10c29 Replacing the private implementations of SwapValue with calls to sys::swapByteOrder()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210980 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-14 13:49:57 +00:00
Artyom Skrobov
ab22d95481 Using llvm::sys::swapByteOrder() for the common case of byte-swapping a value in place
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210978 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-14 13:18:07 +00:00
Artyom Skrobov
25e659b6ff Adding llvm::sys::swapByteOrder() for the common use-case of byte-swapping a value in place
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210976 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-14 12:52:55 +00:00
Artyom Skrobov
9bb92cb537 Renaming SwapByteOrder() to getSwappedBytes()
The next commit will add swapByteOrder(), acting in-place



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210973 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-14 11:36:01 +00:00
Matt Arsenault
7a3a020478 R600: Add failing testcases.
These are reduced from assert in the
OpenCV CvtColor8u.BGR5652GRAY test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210969 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-14 04:26:09 +00:00
Matt Arsenault
212514f179 Fix typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210968 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-14 04:26:07 +00:00
Matt Arsenault
aac455af99 R600: Fix asserts related to constant initializers
This would assert if a constant address space was extern
and therefore didn't have an initializer. If the initializer
was undef, it would hit the unreachable unhandled initializer case.

An extern global should never really occur since we don't have
machine linking, but bugpoint likes to remove initializers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210967 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-14 04:26:05 +00:00
Matt Arsenault
15f474c925 R600: Use address space enum instead of value
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210966 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-14 04:26:01 +00:00
Nick Lewycky
38be65b328 Remove extra whitespace in function declaration. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210965 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-14 03:48:29 +00:00
David Blaikie
d32eccc97b DebugInfo: Remove some extra handling of abstract variables and instead rely solely on the delayed handling introduced in r210946
Now that we handle finding abstract variables at the end of the module,
remove the upfront handling and just ensure the abstract variable is
built when necessary.

In theory we could have a split implementation, where inlined variables
are immediately constructed referencing the abstract definition, and
concrete variables are delayed - but let's go with one solution for now
unless there's a reason not to.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210961 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-13 23:52:55 +00:00
Eric Christopher
53551e2476 Remove InstrItineraryData off of the TargetMachine - it's already
on the subtarget and just forward the accessor.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210955 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-13 23:11:13 +00:00
Eric Christopher
58c99da4d8 Move ARMJITInfo off of the TargetMachine and down onto the subtarget.
This required untangling a mess of headers that included around.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210953 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-13 23:04:46 +00:00
Jiangning Liu
087f56e927 Complete remove test/Transforms/GlobalMerge.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210952 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-13 23:00:36 +00:00
Jiangning Liu
c5bc067a0f Move GlobalMerge from Transform to CodeGen.
This patch is to move GlobalMerge pass from Transform/Scalar                                                           
to CodeGen, because GlobalMerge depends on TargetMachine.
In the mean time, the macro INITIALIZE_TM_PASS is also moved
to CodeGen/Passes.h. With this fix we can avoid making
libScalarOpts depend on libCodeGen.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210951 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-13 22:57:59 +00:00