Lang Hames
944520f38c
Add functions 'hasPredecessor' and 'hasPredecessorHelper' to SDNode. The
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hasPredecessorHelper function allows predecessors to be cached to speed up
repeated invocations. This fixes PR10186.
X.isPredecessorOf(Y) now just calls Y.hasPredecessor(X)
Y.hasPredecessor(X) calls Y.hasPredecessorHelper(X, Visited, Worklist) with
empty Visited and Worklist sets (i.e. no caching over invocations).
Y.hasPredecessorHelper(X, Visited, Worklist) caches search state in Visited
and Worklist to speed up repeated calls. The Visited set is searched for X
before going to the worklist to further search the DAG if necessary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134592 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-07 04:31:51 +00:00
Bill Wendling
6a6b8c3e96
Add a target hook to encode the compact unwind information.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134577 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-07 00:54:13 +00:00
Owen Anderson
9cbd7afb76
Fix a subtle issue in SmallVector. The following code did not work as expected:
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vec.insert(vec.begin(), vec[3]);
The issue was that vec[3] returns a reference into the vector, which is invalidated when insert() memmove's the elements down to make space. The method needs to specifically detect and handle this case to correctly match std::vector's semantics.
Thanks to Howard Hinnant for clarifying the correct behavior, and explaining how std::vector solves this problem.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134554 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-06 22:36:59 +00:00
Nick Lewycky
298bc9a1a5
Add ImmutableList::contains(). Patch by Rui Paulo!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134545 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-06 21:59:48 +00:00
Jim Grosbach
806fcc040e
Don't require pseudo-instructions to carry encoding information.
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For now this is distinct from isCodeGenOnly, as code-gen-only
instructions can (and often do) still have encoding information
associated with them. Once we've migrated all of them over to true
pseudo-instructions that are lowered to real instructions prior to
the printer/emitter, we can remove isCodeGenOnly and just use isPseudo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134539 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-06 21:33:38 +00:00
Devang Patel
231a5ab746
Simplify. Consolidate dbg.declare handling in AllocaPromoter.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134538 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-06 21:09:55 +00:00
Bill Wendling
486dd90696
Constify getCompactUnwindRegNum.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134527 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-06 20:33:48 +00:00
Evan Cheng
b262799d49
createMCInstPrinter doesn't need TargetMachine anymore.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134525 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-06 19:45:42 +00:00
Jakub Staszak
9da9934e27
Introduce "expect" intrinsic instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134516 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-06 18:22:43 +00:00
Dan Gohman
9c04b5bd28
Remove the ObjC ARC passes from the default optimization list, and add
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extension points to be used by clang.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134444 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-05 22:01:44 +00:00
Devang Patel
c5e9138797
Speculatively revert r134431.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134440 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-05 21:16:28 +00:00
Devang Patel
15cf76ca75
Clear debug loc while updating insert point.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134431 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-05 18:58:22 +00:00
Michael J. Spencer
dedd6ee135
Fix 80-col.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134409 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-05 14:49:08 +00:00
Tobias Grosser
598179ee2f
SuccIterator on bbs without terminator insts
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Remove the assert that triggers if SuccIterator is constructed for a basic block
without a terminator instruction. Instead of triggering an assert a succ_end()
iterator is returned. This models a basic block with zero successors and allows
us to use F->viewCFG() on incompletely constructed functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134398 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-04 23:09:02 +00:00
Jakob Stoklund Olesen
d519de0827
Include a source location when complaining about bad inline assembly.
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Add a MI->emitError() method that the backend can use to report errors
related to inline assembly. Call it from X86FloatingPoint.cpp when the
constraints are wrong.
This enables proper clang diagnostics from the backend:
$ clang -c pr30848.c
pr30848.c:5:12: error: Inline asm output regs must be last on the x87 stack
__asm__ ("" : "=u" (d)); /* { dg-error "output regs" } */
^
1 error generated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134307 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02 03:53:34 +00:00
Evan Cheng
2416b89621
Add getFeatureBits to extract feature bits for a given CPU.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134298 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02 00:43:44 +00:00
Eric Christopher
4d59ff95d8
Remove the confusing getDarwinNumber() api and friends.
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Part of rdar://9714064
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134291 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02 00:19:55 +00:00
Douglas Gregor
6ced1d12dd
Add initial *-*-rtems* target, from Joel Sherrill
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134282 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01 22:41:06 +00:00
Evan Cheng
ce795dc92f
Add MCSubtargetInfo target registry stuff.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134279 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01 22:25:04 +00:00
Evan Cheng
5b1b4489cf
Rename TargetSubtarget to TargetSubtargetInfo for consistency.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134259 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01 21:01:15 +00:00
Evan Cheng
94214703d9
- Added MCSubtargetInfo to capture subtarget features and scheduling
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itineraries.
- Refactor TargetSubtarget to be based on MCSubtargetInfo.
- Change tablegen generated subtarget info to initialize MCSubtargetInfo
and hide more details from targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134257 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01 20:45:01 +00:00
Evan Cheng
4db3cffe94
Hide the call to InitMCInstrInfo into tblgen generated ctor.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134244 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01 17:57:27 +00:00
Rafael Espindola
3f9b9eb57d
Fix use after free.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134234 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01 04:40:50 +00:00
Evan Cheng
e1bff38386
Switch SubtargetFeatures from std::string to StringRef.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134219 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01 00:23:10 +00:00
Bill Wendling
5cd2791513
Add target a target hook to get the register number used by the compact unwind
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encoding for the registers it knows about. Return -1 if it can't handle that
register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134202 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-30 23:20:32 +00:00
Rafael Espindola
cfe5254cd3
Create a isFullCopy predicate.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134189 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-30 21:15:52 +00:00
Rafael Espindola
77a2c372fa
Add r134057 back, but splice the predecessor after the successors phi
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nodes.
Original message:
Let simplify cfg simplify bb with only debug and lifetime intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134182 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-30 20:14:24 +00:00
Evan Cheng
276365dd4b
Fix the ridiculous SubtargetFeatures API where it implicitly expects CPU name to
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be the first encoded as the first feature. It then uses the CPU name to look up
features / scheduling itineray even though clients know full well the CPU name
being used to query these properties.
The fix is to just have the clients explictly pass the CPU name!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134127 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-30 01:53:36 +00:00
Eric Christopher
5244c4cc2f
Remove getRegClassForInlineAsmConstraint and all dependencies.
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Fixes rdar://9643582
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134123 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-30 01:20:03 +00:00
Devang Patel
272511f518
Revert r133953 for now.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134116 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-29 23:50:13 +00:00
Andrew Trick
3290239daf
Added IRBuilder::SetInsertPoint(Use) to find a valid insertion point
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that dominates the given Use.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134111 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-29 23:01:52 +00:00
Andrew Trick
45f454d569
whitespace
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134110 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-29 22:52:51 +00:00
Evan Cheng
33b259f46c
Indentation
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134100 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-29 21:58:37 +00:00
Chad Rosier
ce77aa3edc
Temporarily revert r134057: "Let simplify cfg simplify bb with only debug and
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lifetime intrinsics" due to buildbot failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134071 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-29 16:22:11 +00:00
Rafael Espindola
0fb7dcd48f
Let simplify cfg simplify bb with only debug and lifetime intrinsics.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134057 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-29 05:25:47 +00:00
Evan Cheng
ab8be96fd3
Sink SubtargetFeature and TargetInstrItineraries (renamed MCInstrItineraries) into MC.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134049 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-29 01:14:12 +00:00
Evan Cheng
d807674c8b
Trim include
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134048 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-29 00:35:31 +00:00
Evan Cheng
a01b58af85
Unbreak every backend.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134031 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-28 21:33:11 +00:00
Evan Cheng
d5b03f252c
Move CallFrameSetupOpcode and CallFrameDestroyOpcode to TargetInstrInfo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134030 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-28 21:14:33 +00:00
Evan Cheng
94b01f6882
Add MCInstrInfo registeration machinery.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134026 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-28 20:29:03 +00:00
Evan Cheng
22fee2dff4
Merge XXXGenRegisterNames.inc into XXXGenRegisterInfo.inc
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134024 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-28 20:07:07 +00:00
Evan Cheng
e837dead3c
- Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and
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sink them into MC layer.
- Added MCInstrInfo, which captures the tablegen generated static data. Chang
TargetInstrInfo so it's based off MCInstrInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134021 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-28 19:10:37 +00:00
Jay Foad
4f91054fe4
PR10210: New method ConstantArray::getAsCString(). Use it in LTO to
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avoid getting embedded trailing null bytes in std::strings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133999 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-28 08:24:19 +00:00
Andrew Trick
6d64a04a4d
Cleanup. Fix a stupid variable name.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133996 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-28 05:44:06 +00:00
Andrew Trick
5e7645be4c
SCEVExpander: give new insts a name that identifies the reponsible pass.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133992 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-28 05:07:32 +00:00
Evan Cheng
f46e7e3d7f
Remove RegClass2VRegMap from MachineRegisterInfo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133967 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-27 23:54:40 +00:00
Evan Cheng
4db3748fcf
Remove RCBarriers from TargetInstrDesc.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133964 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-27 23:47:21 +00:00
Evan Cheng
f10711fb8c
Remove the experimental (and unused) pre-ra splitting pass. Greedy regalloc can split live ranges.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133962 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-27 23:40:45 +00:00
Devang Patel
016c5829a5
During bottom up fast-isel, instructions emitted to materalize registers are at top of basic block and do not have debug location. This may misguide debugger while entering the basic block and sometimes debugger provides semi useful view of current location to developer by picking up previous known location as current location. Assign a sensible location to the first instruction in a basic block, if it does not have one location derived from source file, so that debugger can provide meaningful user experience to developers in edge cases.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133953 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-27 22:32:04 +00:00
Evan Cheng
15993f83a4
More refactoring. Move getRegClass from TargetOperandInfo to TargetInstrInfo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133944 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-27 21:26:13 +00:00