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3350 Commits

Author SHA1 Message Date
Eric Christopher
f9764fa14f Start of generalized call support for ARM fast isel. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115203 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 20:49:44 +00:00
Jim Grosbach
a3fbadfcd8 Nuke a few more unused asm strings 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115193 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 19:53:58 +00:00
Jim Grosbach
3787a40e03 Move getPointerSize() to the base class since it's not dependent on MachO 
vs. ELF

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115180 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 17:45:51 +00:00
Jim Grosbach
af2a8b21f1 Remove extraneous ';' 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115176 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 17:19:17 +00:00
Jim Grosbach
71d933a49e The asm strings are never used at all, so just nuke 'em entirely. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115160 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 16:56:53 +00:00
Kevin Enderby
8ebf66236e Adds getPointerSize() to the AsmBackend which will be needed by the final patch 
for the dwarf .loc support to emit dwarf line number tables.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115153 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 16:38:07 +00:00
Jim Grosbach
2f24c4ece0 80 column fix 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115149 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 15:25:22 +00:00
Jason W Kim
a4c27248b5 Fix two tiny issues (ARM does not need COFF) and comment sanity. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115147 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 14:58:19 +00:00
Jim Grosbach
f73fd7278f trailing whitespace 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115136 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 03:21:00 +00:00
Jim Grosbach
87dc3aa2d8 Remove misplaced ';'. Make buildbots happy, hopefully. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115135 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 03:20:34 +00:00
Jason W Kim
afd1cc2578 Tiny patch for proof-of-concept cleanup of ARMAsmPrinter::EmitStartOfAsmFile() 
Small test for sanity check of resulting ARM .s file.
Tested against -r115129.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115133 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 02:45:56 +00:00
Jim Grosbach
7ebc863c15 Go ahead and jump! 
Now that the MC lowering handles the expansion of the pseudos, kill the horrible
blobs of text.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115130 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 02:18:06 +00:00
Jason W Kim
d4d4f4f488 I added a new file ARMAsmBackend which stubs out in similar ways to 
the eqv X86 class.
For now, I split the ELFARMAsmBackend from the DarwinARMAsmBackend
(also mimicking X86)

Tested against -r115126



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115129 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 02:17:26 +00:00
Jim Grosbach
a4e97de71d Now that the pseudos that needed this are all custom lowered, we can go back 
to an empty PrintSpecial()

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115128 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 02:02:22 +00:00
Jim Grosbach
2317e40539 Nuke it from orbit. It's the only way to be sure. 
(Kill the dead non-MC asm printer for the ARM target.)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115127 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 01:57:53 +00:00
Evan Cheng
0e55fd61ae ARM instruction itinerary fixes: 
1. Cortex-a9 8-bit and 16-bit loads / stores AGU cycles are 1 cycle longer than 32-bit ones.
2. Cortex-a9 is out-of-order so model all read cycles as cycle 1.
3. Lots of other random fixes for A8 and A9.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115121 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 01:08:25 +00:00
Eric Christopher
a9a7a1a9a5 Refactor arm fast isel libcall handling so that pieces can be used 
for generic call handling.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115105 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-29 23:11:09 +00:00
Evan Cheng
3881cb7a5d Model Cortex-a9 load to SUB, RSB, ADD, ADC, SBC, RSC, CMN, MVN, or CMP 
pipeline forwarding path.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115098 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-29 22:42:35 +00:00
Eric Christopher
8cf6c60710 Add a convenience variable so I'm not chasing all over looking for 
a context.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115094 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-29 22:24:45 +00:00
Jim Grosbach
828916203a Add specializations of addrmode2 that allow differentiating those forms 
which require the use of the shifter-operand. This will be used to split
the ldr/str instructions such that those versions needing the shifter operand
can get a different scheduling itenerary, as in some cases, the use of the
shifter can cause different scheduling than the simpler forms.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115066 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-29 19:03:54 +00:00
Bob Wilson
7122ba7efb Increase ARM APCS preferred alignment for i64 and f64 from 32 bits to 64 bits. 
LDM/STM instructions can run one cycle faster on some ARM processors if the
memory address is 64-bit aligned.  Radar 8489376.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115047 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-29 17:54:10 +00:00
Jim Grosbach
be91232900 Add braces for legibility. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115043 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-29 17:32:29 +00:00
Jim Grosbach
b454cdaebc One Printer to rule them all, One Printer to find them, 
One Printer to lower them all and in the back end bind them.


(Remove option to use the old non-MC asm printer.)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115038 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-29 15:23:40 +00:00
Gabor Greif
05642a3eba improve heuristics to find the 'and' corresponding to 'tst' to also catch opportunities on thumb2 
added some doxygen on the way

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115033 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-29 10:12:08 +00:00
Chris Lattner
7c51a3172c implement rdar://8456378 and PR7557 - support for the fstsw, 
an instruction that requires a WHOLE NEW wonderful kind of alias.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115015 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-29 01:50:45 +00:00
Chris Lattner
7036f8be4d change the protocol TargetAsmPArser::MatchInstruction method to take an 
MCStreamer to emit into instead of an MCInst to fill in.  This allows the
matcher extra flexibility and is more convenient.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115014 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-29 01:42:58 +00:00
Eric Christopher
229207aa2e Rework comparison handling to set a register on true/false. This avoids 
problems with phi-nodes in blocks that have hard and not virtual registers.

Accordingly update branch handling to compensate.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115013 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-29 01:14:47 +00:00
Eric Christopher
f8476e6742 Remove unnecessary set ahead of time. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115011 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-29 00:50:57 +00:00
Evan Cheng
5d42c567c9 Separate itinerary classes for mvn from mov; for tst / teq from cmp / cmn. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115010 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-29 00:49:25 +00:00
Eric Christopher
98de5b4603 Remove assert, add comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115009 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-29 00:49:09 +00:00
Evan Cheng
7e1bf305cf Assign bitwise binary instructions different itinerary classes from ALU instructions such as add / sub. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115008 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-29 00:27:46 +00:00
Evan Cheng
63d66eed16 Add support to model pipeline bypass / forwarding. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115005 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-28 23:50:49 +00:00
Eric Christopher
744c7c8e1b 32-bit constant ints only for now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115001 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-28 22:47:54 +00:00
Oscar Fuentes
3609eb0de2 Removed a bunch of unnecessary target_link_libraries. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114999 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-28 22:39:14 +00:00
Owen Anderson
654d5440a4 Add a subtarget hook for reporting the misprediction penalty. Use this to provide more precise 
cost modeling for if-conversion.  Now if only we had a way to estimate the misprediction probability.

Adjsut CodeGen/ARM/ifcvt10.ll.  The pipeline on Cortex-A8 is long enough that it is still profitable
to predicate an ldm, but the shorter pipeline on Cortex-A9 makes it unprofitable.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114995 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-28 21:57:50 +00:00
Eric Christopher
fd60980eb2 Integer materialization needed the same thinko change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114994 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-28 21:55:34 +00:00
Nick Lewycky
a6136b7156 Resolve this GCC warning: 
ARMTargetMachine.cpp:53: error: control reaches end of non-void function


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114992 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-28 21:40:26 +00:00
Anton Korobeynikov
4f922f2cca User proper libcall names & condcodes while compiling for ARM EABI. 
Patch by Evzen Muller!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114991 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-28 21:39:26 +00:00
Owen Anderson
b20b85168c Part one of switching to using a more sane heuristic for determining if-conversion profitability. 
Rather than having arbitrary cutoffs, actually try to cost model the conversion.

For now, the constants are tuned to more or less match our existing behavior, but these will be
changed to reflect realistic values as this work proceeds.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114973 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-28 18:32:13 +00:00
Jim Grosbach
2d0f53bd63 Factor out dbg_value comment printing and teach MC asm printing to use it. 
This should make the arm-linux self-host buildbot happy again.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114964 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-28 17:05:56 +00:00
Oscar Fuentes
38e1390c29 Add ARM Disassembler to the CMake build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114949 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-28 11:48:19 +00:00
Eric Christopher
a99c3e9acd 80-col fixups. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114943 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-28 04:18:29 +00:00
Bob Wilson
02aba73a9e Add a command line option "-arm-strict-align" to disallow unaligned memory 
accesses for ARM targets that would otherwise allow it.  Radar 8465431.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114941 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-28 04:09:35 +00:00
Eric Christopher
7ed8ec94d9 Rework builtin handling and call setup. The builtin handling 
now takes a libcall operand, sets up the arguments correctly and
handles stack adjustments.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114934 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-28 01:21:42 +00:00
Eric Christopher
5371cabfc2 Fix typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114931 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-28 00:35:33 +00:00
Eric Christopher
f5732c4ee5 Fix fp constant loads to have a destination register. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114930 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-28 00:35:09 +00:00
Jim Grosbach
385cc5eede Enable the MC-ized ARM asm printer. Passing all local tests, so it's time to 
enable it for real. Leaving the CL option in place to it's easy to disable it
again if (when) testers find something I've missed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114915 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-27 22:28:11 +00:00
Jim Grosbach
5acb3de8b7 ARM-mode eh.sjlj.longjmp MC lowering 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114896 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-27 21:47:04 +00:00
Jim Grosbach
376ce97bac Enable the MC-ized ARM asm printer. Passing all local tests, so it's time to 
enable it for real. Leaving the CL option in place to it's easy to disable it
again if (when) testers find something I've missed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114892 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-27 21:28:44 +00:00
Daniel Dunbar
3b9569e70d Hard to imagine there are still people using inferior compilers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114862 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-27 20:12:58 +00:00