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4d0e8a8a3e2e5b98f598acad4d57452b99d52e74
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47 Commits

Author SHA1 Message Date
Christian Konig
4d0e8a8a3e R600/SI: dynamical figure out the reg class of MIMG 
Depending on the number of bits set in the writemask.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179166 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-10 08:39:16 +00:00
Christian Konig
84a775d8e3 R600/SI: adjust writemask to only the used components 
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179165 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-10 08:39:08 +00:00
Christian Konig
9c210dabda R600/SI: remove image sample writemask 
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179164 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-10 08:39:01 +00:00
Tom Stellard
17ea10cb79 R600/SI: Add support for buffer stores v2 
v2:
  - Use the ADDR64 bit

Reviewed-by: Christian König <christian.koenig@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178931 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-05 23:31:51 +00:00
Tom Stellard
2a4d3e7e87 R600/SI: Add processor types for each SI variant 
Reviewed-by: Christian König <christian.koenig@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178928 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-05 23:31:35 +00:00
Tom Stellard
2fc7443498 R600/SI: Avoid generating S_MOVs with 64-bit immediates v2 
SITargetLowering::analyzeImmediate() was converting the 64-bit values
to 32-bit and then checking if they were an inline immediate.  Some
of these conversions caused this check to succeed and produced
S_MOV instructions with 64-bit immediates, which are illegal.

v2:
  - Clean up logic

Reviewed-by: Christian König <christian.koenig@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178927 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-05 23:31:20 +00:00
Vincent Lejeune
39cd6fae34 R600: Take export into account when computing cf address 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178761 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-04 13:59:59 +00:00
Vincent Lejeune
5417223f98 R600: Fix last ALU of a clause being emitted in a separate clause 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178675 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-03 18:24:47 +00:00
Vincent Lejeune
08001a5a15 R600: Add support for native control flow 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178505 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-01 21:48:05 +00:00
Vincent Lejeune
8e59191eb8 R600: Emit CF_ALU and use true kcache register. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178503 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-01 21:47:42 +00:00
Christian Konig
00b3b5fbf4 R600/SI: add SETO/SETUO patterns 
6 more piglit tests.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178145 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-03-27 15:27:31 +00:00
Christian Konig
e49230895d R600/SI: add cummuting of rev instructions 
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178127 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-03-27 09:12:59 +00:00
Christian Konig
45b14e341a R600/SI: add mulhu/mulhs patterns 
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178126 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-03-27 09:12:51 +00:00
Christian Konig
a62b1a149a R600/SI: add srl/sha patterns for SI 
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178125 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-03-27 09:12:44 +00:00
Christian Konig
f623008122 R600/SI: mark most intrinsics as readnone v2 
They read from constant register space anyway.

v2: fix lit tests

Signed-off-by: Christian König <christian.koenig@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178020 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-03-26 14:03:57 +00:00
Michel Danzer
21675c8ab0 R600: Fix up test/CodeGen/R600/llvm.pow.ll for r177730 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177736 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-03-22 15:24:16 +00:00
Vincent Lejeune
3ab0ba3cd8 R600: Factorize code handling Const Read Port limitation 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177078 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-03-14 15:50:45 +00:00
NAKAMURA Takumi
7e6274dc66 llvm/test/CodeGen/R600/schedule-*.ll: Let them require +Asserts. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176835 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-03-11 23:16:30 +00:00
Vincent Lejeune
fd49dac48f R600: Fix JUMP handling so that MachineInstr verification can occur 
This allows R600 Target to use the newly created -verify-misched llc flag

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176819 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-03-11 18:15:06 +00:00
Benjamin Kramer
1cb47b9afe Test case hygiene. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176772 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-03-09 18:25:40 +00:00
Tom Stellard
7893d29c62 R600: Optimize another selectcc case 
fold selectcc (selectcc x, y, a, b, cc), b, a, b, setne ->
     selectcc x, y, a, b, cc

Reviewed-by: Christian König <christian.koenig@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176700 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-03-08 15:37:11 +00:00
Tom Stellard
1454cb86be R600: Improve custom lowering of select_cc 
Two changes:
1. Prefer SET* instructions when possible
2. Handle the CND*_INT case with floating-point args

Reviewed-by: Christian König <christian.koenig@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176699 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-03-08 15:37:09 +00:00
Tom Stellard
d416505906 R600: Change operation action from Custom to Expand for BR_CC 
Reviewed-by: Christian König <christian.koenig@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176698 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-03-08 15:37:07 +00:00
Tom Stellard
9c6b0b0cce R600: Change operation action from Custom to Expand for SETCC 
Reviewed-by: Christian König <christian.koenig@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176697 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-03-08 15:37:05 +00:00
Tom Stellard
03abf2f2aa LegalizeDAG: Respect the result of TLI.getBooleanContents() when expanding SETCC 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176695 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-03-08 15:37:02 +00:00
Vincent Lejeune
b59f8685e4 R600: Change addresspace in fold-kcache.ll 
AddressSpace definition has changed in a previous commit, reflect it
to avoid false failure.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176693 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-03-08 15:34:07 +00:00
Christian Konig
93a9840c0a R600/SI: adjust test to recent changes 
Signed-off-by: Christian König <christian.koenig@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176691 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-03-08 14:44:00 +00:00
Vincent Lejeune
cae6801b7d R600: Turn BUILD_VECTOR into Reg_Sequence 
Reviewed-by: Tom Stellard <thomas.stellard at amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176487 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-03-05 15:04:49 +00:00
Vincent Lejeune
f49cf1c320 R600: Use MUL_IEEE for trig/fdiv intrinsic 
Reviewed-by: Tom Stellard <thomas.stellard at amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176485 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-03-05 15:04:37 +00:00
Christian Konig
5f58358c90 R600/SI: fix sampler tests after fixing wait insertions 
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176359 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-03-01 17:39:05 +00:00
Tom Stellard
70a9ca9420 R600: Fix for Unigine when MachineSched is enabled 
Fixes for-loop.cl piglit test

Patch By: Vincent Lejeune

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

NOTE: This is a candidate for the Mesa stable branch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175742 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-02-21 15:06:59 +00:00
Michel Danzer
74bf7a8467 R600/SI: Make sure M0 is loaded for V_INTERP_MOV_F32 
NOTE: This is a candidate for the Mesa stable branch.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175733 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-02-21 08:57:10 +00:00
Vincent Lejeune
e3111964a0 R600/SI: Use MULADD_IEEE/V_MAD_F32 instruction for mad pattern 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175446 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-02-18 14:11:28 +00:00
Vincent Lejeune
7867885737 R600: Do not fold single instruction with more that 3 kcache read 
It fixes around 100 tfb piglit tests and 16 glean tests.

NOTE: This is a candidate for the Mesa stable branch.

Reviewed-by: Tom Stellard <thomas.stellard at amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175183 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-02-14 16:57:19 +00:00
Michel Danzer
d4addbe78a R600: Add lit tests for texture sampling instruction selection. 
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175138 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-02-14 07:43:51 +00:00
Tom Stellard
76308d8d28 R600: Add support for 128-bit parameters 
NOTE: This is a candidate for the Mesa stable branch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175096 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-02-13 22:05:20 +00:00
Tom Stellard
1234c9be42 R600: Add support for SET*_DX10 instructions 
These instructions compare two floating point values and return an
integer true (-1) or false (0) value.

When compiling code generated by the Mesa GLSL frontend, the SET*_DX10
instructions save us four instructions for most branch decisions that
use floating-point comparisons.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174609 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-02-07 14:02:35 +00:00
Tom Stellard
2a77cf7f47 R600: Add tests for unsupported condition codes. 
All of the le and lt variants are unsupported.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174608 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-02-07 14:02:33 +00:00
Tom Stellard
b4409610a2 R600: Fix assembly name for SETGT_INT 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174607 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-02-07 14:02:27 +00:00
Tom Stellard
ebc535bc4a R600: Add tests for instruction predicates 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174393 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-02-05 17:09:13 +00:00
Tom Stellard
3ce2ec8478 R600: Emit function name in the AsmPrinter 
Emitting the function name allows us to check for it in the FileCheck
tests so we can make sure FileCheck is checking the output of the
correct function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174392 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-02-05 17:09:11 +00:00
Tom Stellard
4bdf9890ed R600: Fold clamp, neg, abs 
Patch by: Vincent Lejeune

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174099 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-01-31 22:11:54 +00:00
Tom Stellard
d40758b24e DAGCombiner: Avoid generating illegal vector INT_TO_FP nodes 
DAGCombiner::reduceBuildVecConvertToConvertBuildVec() was making two
mistakes:

1. It was checking the legality of scalar INT_TO_FP nodes and then generating
vector nodes.

2. It was passing the result value type to
TargetLoweringInfo::getOperationAction() when it should have been
passing the value type of the first operand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171420 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-01-02 22:13:01 +00:00
Tom Stellard
519b456fe1 R600: Expand vec4 INT <-> FP conversions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170901 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 16:33:24 +00:00
Tom Stellard
f98f2ce29e Add R600 backend 
A new backend supporting AMD GPUs: Radeon HD2XXX - HD7XXX

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169915 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-11 21:25:42 +00:00
Tom Stellard
a4be0720c5 Revert "test/CodeGen/R600: Add some basic tests v6" 
This reverts commit 11d3457afcda7848448dd7f11b2ede6552ffb9ea.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160300 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-07-16 18:19:43 +00:00
Tom Stellard
2015236dfc test/CodeGen/R600: Add some basic tests v6 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160273 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-07-16 14:17:19 +00:00