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Author SHA1 Message Date
Evan Cheng
7e399c14ab Another typo. Pointed out by Nate Begeman. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28353 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-17 18:22:14 +00:00
Evan Cheng
6c43f35d74 Fixed a LowerCallTo and LowerArguments bug. They were introducing illegal 
VBIT_VECTOR nodes. There were some confusion about the semantics of
getPackedTypeBreakdown(). e.g. for <4 x f32> it returns 1 and v4f32, not 4,
and f32.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28352 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-17 18:16:39 +00:00
Evan Cheng
e9b3da17cd Fix an obvious bug in getPackedTypeBreakdown. Return 1 if type is legal. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28351 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-17 18:10:06 +00:00
Chris Lattner
c5d7d7c715 When we legalize target nodes, do not use getNode to create a new node, 
use UpdateNodeOperands to just update the operands!  This is important because
getNode will allocate a new node if the node returns a flag and this breaks
assumptions in the legalizer that you can legalize some things multiple times
and get exactly the same results.

This latent bug was exposed by my ppc patch last night, and this fixes
gsm/toast.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28348 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-17 18:00:08 +00:00
Chris Lattner
b248e16afd Add an assertion, avoid some unneeded work for each call. No functionality 
change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28347 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-17 17:55:45 +00:00
Chris Lattner
da098e7d10 Add support for calls that pass and return legal vectors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28340 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-16 23:39:44 +00:00
Chris Lattner
f4ec817299 Add a new ISD::CALL node, make the default impl of TargetLowering::LowerCallTo 
produce it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28338 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-16 22:53:20 +00:00
Andrew Lenharth
3e348494bb this should be 128 I think 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28330 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-16 17:45:23 +00:00
Andrew Lenharth
dae9cbe8d4 Move this code to a common place 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28329 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-16 17:42:15 +00:00
Chris Lattner
8c0c10c2b9 Add a chain to FORMAL_ARGUMENTS. This is a minimal port of the X86 backend, 
it doesn't currently use/maintain the chain properly.  Also, make the
X86ISelLowering.cpp file 80-col clean.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28320 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-16 06:45:34 +00:00
Chris Lattner
966454129d Move function-live-in-handling code from the sdisel code to the scheduler. 
This code should be emitted after legalize, so it can't be in sdisel.

Note that the EmitFunctionEntryCode hook should be updated to operate on the
DAG.  The X86 backend is the only one currently using this hook.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28315 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-16 06:10:58 +00:00
Chris Lattner
4e92027837 Print the vreg that livein physregs are live in 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28314 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-16 05:55:30 +00:00
Chris Lattner
e2e41730cc Legalize FORMAL_ARGUMENTS nodes correctly, we don't want to legalize them once 
for each argument.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28313 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-16 05:49:56 +00:00
Evan Cheng
8820ad5154 Fixing 2006-05-01-SchedCausingSpills.ll; some clean up 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28279 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-13 08:22:24 +00:00
Evan Cheng
ee00a1d12c Revert an un-intended change 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28278 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-13 05:53:47 +00:00
Chris Lattner
a2d079a776 Merge identical code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28274 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-13 02:11:14 +00:00
Evan Cheng
3b6d56cab3 If the register allocator cannot find a register to spill, try the aliases. If 
that still fails (because all the register spill weights are inf), just grab
one.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28262 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-12 19:07:46 +00:00
Chris Lattner
b5d9319bc5 Remove dead vars 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28255 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-12 18:06:45 +00:00
Chris Lattner
f1343c1b79 remove dead vars 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28254 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-12 18:04:28 +00:00
Chris Lattner
c485e55c65 Remove dead variable 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28253 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-12 18:02:04 +00:00
Chris Lattner
5eed34d208 Comment out dead variables 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28252 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-12 17:57:54 +00:00
Chris Lattner
9dcb780e23 Remove dead var 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28250 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-12 17:50:35 +00:00
Chris Lattner
e41102bb61 Compile: 
%tmp152 = setgt uint %tmp144, %tmp149           ; <bool> [#uses=1]
        %tmp159 = setlt uint %tmp144, %tmp149           ; <bool> [#uses=1]
        %bothcond2 = or bool %tmp152, %tmp159           ; <bool> [#uses=1]

To setne, not setune, which causes an assertion fault.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28244 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-12 17:03:46 +00:00
Owen Anderson
07000c6f01 Refactor a bunch of includes so that TargetMachine.h doesn't have to include 
TargetData.h.  This should make recompiles a bit faster with my current
TargetData tinkering.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28238 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-12 06:33:49 +00:00
Evan Cheng
647c15e58e Backing out fix for PR770. Need to re-apply it after live range splitting is possible 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28236 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-12 06:06:34 +00:00
Evan Cheng
626da3d9ae Duh. That could take a long time. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28235 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-12 06:05:18 +00:00
Chris Lattner
21a57dc751 Two simplifications for token factor nodes: simplify tf(x,x) -> x. 
simplify tf(x,y,y,z) -> tf(x,y,z).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28233 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-12 05:01:37 +00:00
Evan Cheng
13d41b9d72 Add capability to scheduler to commute nodes for profit. 
If a two-address code whose first operand has uses below, it should be commuted
when possible.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28230 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-12 01:58:24 +00:00
Evan Cheng
e165a78551 Refactor scheduler code. Move register-reduction list scheduler to a 
separate file. Added an initial implementation of top-down register pressure
reduction list scheduler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28226 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-11 23:55:42 +00:00
Evan Cheng
993141402f Set weight of zero length intervals to infinite to prevent them from being 
spilled.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28220 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-11 07:29:24 +00:00
Evan Cheng
5d02eafaf2 Backing out previous check-in. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28219 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-11 07:28:16 +00:00
Evan Cheng
1f300190f3 If the live interval legnth is essentially zero, i.e. in every live range 
the use follows def immediately, it doesn't make sense to spill it and
hope it will be easier to allocate for this LI.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28217 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-10 22:30:41 +00:00
Evan Cheng
90db0358bb Templatify RegReductionPriorityQueue 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28212 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-10 06:16:44 +00:00
Nate Begeman
ec57fd91af Fix PR773 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28207 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-09 18:20:51 +00:00
Chris Lattner
c8d37c6e14 Fix a regression in my patch from last night that broke the llvmgcc4 build on 
ppc


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28205 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-09 16:41:59 +00:00
Evan Cheng
b63b067925 Add pseudo dependency to force a def&use operand to be scheduled last (unless 
the distance between the def and another use is much longer). This is under
option control for now "-sched-lower-defnuse".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28201 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-09 07:13:34 +00:00
Evan Cheng
60e8c71c9f Debugging info 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28200 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-09 06:55:15 +00:00
Evan Cheng
e73701df94 PR 770 - permit coallescing of registers in subset register classes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28197 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-09 06:37:48 +00:00
Chris Lattner
7faec9b93a Implement MASM sections correctly, without a "has masm sections flag" and a bunch of special case code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28194 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-09 05:33:48 +00:00
Chris Lattner
a7090ae7a3 Oh yeah, there are two of these now, unify both. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28192 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-09 05:24:50 +00:00
Chris Lattner
b81cb6133e Setting SwitchToSectionDirective properly in the MASM backend permits a bunch 
of code to be unified.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28191 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-09 05:23:12 +00:00
Chris Lattner
23b9eac4cb Don't prefix section directives with a tab. Doing so causes blank lines to 
be emitted to the .s file.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28189 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-09 05:19:59 +00:00
Chris Lattner
13f161c518 Make the masm codepath work like the normal code path. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28188 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-09 05:15:58 +00:00
Chris Lattner
4ca4bb1ed2 The MASM asmprinter has been fixed, these hacks are no longer needed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28186 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-09 05:13:34 +00:00
Chris Lattner
4632d7a570 Split SwitchSection into SwitchTo{Text|Data}Section methods. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28184 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-09 04:59:56 +00:00
Chris Lattner
4b37e87ab9 Make the case I just checked in stronger. Now we compile this: 
short test2(short X, short x) {
  int Y = (short)(X+x);
  return Y >> 1;
}

to:

_test2:
        add r2, r3, r4
        extsh r2, r2
        srawi r3, r2, 1
        blr

instead of:

_test2:
        add r2, r3, r4
        extsh r2, r2
        srwi r2, r2, 1
        extsh r3, r2
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28175 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-08 21:18:59 +00:00
Chris Lattner
eaeda56649 Implement and_sext.ll:test3, generating: 
_test4:
        srawi r3, r3, 16
        blr

instead of:

_test4:
        srwi r2, r3, 16
        extsh r3, r2
        blr

for:

short test4(unsigned X) {
  return (X >> 16);
}


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28174 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-08 20:59:41 +00:00
Chris Lattner
a850446a0b Compile this: 
short test4(unsigned X) {
  return (X >> 16);
}

to:

_test4:
        movl 4(%esp), %eax
        sarl $16, %eax
        ret

instead of:

_test4:
        movl $-65536, %eax
        andl 4(%esp), %eax
        sarl $16, %eax
        ret


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28171 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-08 20:51:54 +00:00
Chris Lattner
2cfd6746ae Fold shifts with undef operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28167 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-08 17:29:49 +00:00
Chris Lattner
1b7371331f When tracking demanded bits, if any bits from the sext of an SRA are demanded, 
then so is the input sign bit.  This fixes mediabench/g721 on X86.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28166 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-08 17:22:53 +00:00