32533 Commits

Author SHA1 Message Date
Duncan P. N. Exon Smith
4eba62d6c2 PowerPC: Canonicalize access to function attributes, NFC
Canonicalize access to function attributes to use the simpler API.

getAttributes().getAttribute(AttributeSet::FunctionIndex, Kind)
  => getFnAttribute(Kind)

getAttributes().hasAttribute(AttributeSet::FunctionIndex, Kind)
  => hasFnAttribute(Kind)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229224 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-14 02:54:07 +00:00
Matt Arsenault
2d925cbe10 R600/SI: Fix size of VReg_1
This is really a 32-bit register, if we try to check the size of it,
we want 32-bits.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229223 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-14 02:51:44 +00:00
Duncan P. N. Exon Smith
20d6ad9de2 R600: Canonicalize access to function attributes, NFC
Canonicalize access to function attributes to use the simpler API.

getAttributes().getAttribute(AttributeSet::FunctionIndex, Kind)
  => getFnAttribute(Kind)

getAttributes().hasAttribute(AttributeSet::FunctionIndex, Kind)
  => hasFnAttribute(Kind)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229222 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-14 02:45:45 +00:00
Duncan P. N. Exon Smith
39127e77ae Mips: Canonicalize access to function attributes, NFC
Canonicalize access to function attributes to use the simpler API.

getAttributes().getAttribute(AttributeSet::FunctionIndex, Kind)
  => getFnAttribute(Kind)

getAttributes().hasAttribute(AttributeSet::FunctionIndex, Kind)
  => hasFnAttribute(Kind)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229221 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-14 02:37:48 +00:00
Duncan P. N. Exon Smith
f38384bcf1 ARM: Canonicalize access to function attributes, NFC
Canonicalize access to function attributes to use the simpler API.

getAttributes().getAttribute(AttributeSet::FunctionIndex, Kind)
  => getFnAttribute(Kind)

getAttributes().hasAttribute(AttributeSet::FunctionIndex, Kind)
  => hasFnAttribute(Kind)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229220 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-14 02:24:44 +00:00
Duncan P. N. Exon Smith
6a1927d2c1 AArch64: Canonicalize access to function attributes, NFC
Canonicalize access to function attributes to use the simpler API.

getAttributes().getAttribute(AttributeSet::FunctionIndex, Kind)
  => getFnAttribute(Kind)

getAttributes().hasAttribute(AttributeSet::FunctionIndex, Kind)
  => hasFnAttribute(Kind)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229218 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-14 02:09:06 +00:00
Duncan P. N. Exon Smith
894c8c514a X86: Canonicalize access to function attributes, NFC
Canonicalize access to function attributes to use the simpler API.

getAttributes().getAttribute(AttributeSet::FunctionIndex, Kind)
  => getFnAttribute(Kind)

getAttributes().hasAttribute(AttributeSet::FunctionIndex, Kind)
  => hasFnAttribute(Kind)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229214 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-14 01:59:52 +00:00
Ahmed Bougacha
6a50342499 [X86] Factor out the CMOV pseudo definitions. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229206 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-14 01:36:53 +00:00
Matthias Braun
821ec14add Revert "On ELF, put PIC jump tables in a non executable section."
This reverts commit r228939.

The commit broke something in the output of exception handling tables on
darwin x86-64.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229203 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-14 01:16:54 +00:00
Eric Christopher
c21d153388 Use the template method to grab the target specific subtarget.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229191 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-14 00:09:46 +00:00
Eric Christopher
40ccb77781 The base pointer save offset can be computed at initialization time,
do so and fix up the calls.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229169 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-13 22:48:53 +00:00
Eric Christopher
f7f32530e0 Move the target machine variable so that it's initialized early
enough we can use it to initialize frame lowering.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229168 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-13 22:48:51 +00:00
Eric Christopher
7b93acde32 Stash the TargetMachine on the subtarget so we can access it later.
Clean up a subtarget function that has it passed in while we're at it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229164 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-13 22:23:04 +00:00
Eric Christopher
4015892a84 PPC LinkageSize can be computed at initialization time, do so.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229163 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-13 22:22:57 +00:00
Sanjay Patel
fa1b3ba1f0 [SSE/AVX] Use multiclasses to reduce the mass of scalar math patterns; NFCI
This takes the preposterous number of patterns in this section
that were last added to in r219033 down to just plain obnoxious.

With a little more work, we might get this down to just comical.

I've added more test cases to the existing file that checks these
patterns, but it seems that some of these patterns simply don't
exist with today's shuffle lowering.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229158 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-13 21:52:42 +00:00
Sanjay Patel
b7458cc63a fix typos; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229155 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-13 21:07:22 +00:00
Tom Stellard
193679b6ae R600/SI: Refactor SOP1 classes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229152 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-13 21:02:37 +00:00
Tom Stellard
ad4bb96a12 R600/SI: Lowercase register names
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229151 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-13 21:02:36 +00:00
Tom Stellard
1f85e3b090 R600/SI: Remove some unused TableGen classes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229150 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-13 21:02:33 +00:00
Vasileios Kalintiris
a4e58223cb [mips] Refactor and simplify MipsSEDAGToDAGISel::selectIntAddrLSL2MM(). NFC.
Reviewers: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D7618

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229140 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-13 19:14:22 +00:00
Vasileios Kalintiris
00c4738c11 [mips] Use isa<> instead of dyn_cast<> with unused value. NFC.
Reviewers: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D7615

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229138 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-13 19:12:16 +00:00
Matt Arsenault
941454f17f R600/SI: Remove handling of fpimm
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229136 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-13 19:05:07 +00:00
Matt Arsenault
1751616522 R600/SI: Allow f64 inline immediates in i64 operands
This requires considering the size of the operand when
checking immediate legality.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229135 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-13 19:05:03 +00:00
Jozef Kolek
85e08ed8a4 [mips][microMIPS] Delay slot filler: Replace the microMIPS JR with the JRC
This patch adds functionality in MIPS delay slot filler such as if delay slot
filler have to put NOP instruction into the delay slot of microMIPS JR
instruction, then instead of emitting NOP this instruction is replaced by
compact jump instruction JRC.

Differential Revision: http://reviews.llvm.org/D7522


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229128 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-13 17:51:27 +00:00
Toma Tabacu
94b64060af [mips] Improve support for the .set at/noat assembler directives.
Summary:
Made the following changes:
  Added calls to emitDirectiveSetNoAt() and emitDirectiveSetAt().
  Added special emit function for .set at=$reg, emitDirectiveSetAtWithArg(unsigned RegNo).
  Improved parsing error checks for .set at.
  Refactored parser code for .set at.
  Improved testing of both directives.
  Improved code readability and comments.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D7176

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229097 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-13 10:30:57 +00:00
Chandler Carruth
417c5c172c [PM] Remove the old 'PassManager.h' header file at the top level of
LLVM's include tree and the use of using declarations to hide the
'legacy' namespace for the old pass manager.

This undoes the primary modules-hostile change I made to keep
out-of-tree targets building. I sent an email inquiring about whether
this would be reasonable to do at this phase and people seemed fine with
it, so making it a reality. This should allow us to start bootstrapping
with modules to a certain extent along with making it easier to mix and
match headers in general.

The updates to any code for users of LLVM are very mechanical. Switch
from including "llvm/PassManager.h" to "llvm/IR/LegacyPassManager.h".
Qualify the types which now produce compile errors with "legacy::". The
most common ones are "PassManager", "PassManagerBase", and
"FunctionPassManager".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229094 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-13 10:01:29 +00:00
Chandler Carruth
02d6288667 Re-sort #include lines using my handy dandy ./utils/sort_includes.py
script. This is in preparation for changes to lots of include lines.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229088 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-13 09:09:03 +00:00
Craig Topper
f3455f13a2 [X86] Add support for parsing and printing the mnemonic aliases for the XOP VPCOM instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229078 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-13 07:42:25 +00:00
Craig Topper
c5222f156f Fix a typo in a comment. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229071 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-13 06:07:29 +00:00
Craig Topper
db9343fb40 [X86] Remove int_x86_sse2_psll_dq_bs and int_x86_sse2_psrl_dq_bs intrinsics. The builtins aren't used by clang.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229069 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-13 06:07:24 +00:00
Matt Arsenault
c8055a1f5e R600/SI: Remove unnecessary check for fpimm
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229034 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-13 02:47:22 +00:00
Eric Christopher
2b4e1b9abf PPCFrameLowering's FramePointerOffset can be computed at initialization
time. Do so.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228998 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-13 00:39:38 +00:00
Eric Christopher
82eeeb5b94 The TOC save offset can be computed at compile time, do so and
propagate changes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228997 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-13 00:39:36 +00:00
Eric Christopher
b947233818 The return save offset can be computed at initialization time - do
so and save the value.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228996 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-13 00:39:27 +00:00
David Majnemer
73a92d5136 X86: Don't crash if we can't decode the pshufb mask
Constant pool entries are uniqued by their contents regardless of their
type.  This means that a pshufb can have a shuffle mask which isn't a
simple array of bytes.

The code path which attempts to decode the mask didn't check for
failure, causing PR22559.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228979 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-12 23:26:26 +00:00
Rafael Espindola
ef1d2264bc Learn that __DATA,__objc_classrefs is not atomized via symbols.
This should hopefully fix objc on AArch64.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228976 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-12 23:11:59 +00:00
Olivier Sallenave
90e069dc29 Change max interleave factor to 12 for POWER7 and POWER8.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228973 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-12 22:57:58 +00:00
Rafael Espindola
8093f4b9bb Remove mostly unused setters.
Most of the code was setting the TargetOptions directly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228961 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-12 21:16:34 +00:00
Reed Kotler
36068aae42 Add bulk of returning of values to Mips fast-isel
Summary:
Implement the bulk of returning values in Mips fast-isel



Test Plan:
reatabi.ll

Passes test-suite at -O0,-O2 and with mips32r2 and mips32r1.





Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits, aemerson, rfuhler

Differential Revision: http://reviews.llvm.org/D5920

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228958 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-12 21:05:12 +00:00
Simon Pilgrim
00481c20de Relaxed over-zealous alignment requirement for VEX-encoded AES instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228953 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-12 20:01:03 +00:00
Rafael Espindola
c3c5d7c2d6 On ELF, put PIC jump tables in a non executable section.
Fixes PR22558.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228939 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-12 17:46:49 +00:00
Rafael Espindola
8eeedf74d3 Put each jump table in an independent section if the function is too.
This allows the linker to GC both, fixing pr22557.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228937 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-12 17:16:46 +00:00
Benjamin Kramer
d913d9d2c3 MathExtras: Bring Count(Trailing|Leading)Ones and CountPopulation in line with countTrailingZeros
Update all callers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228930 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-12 15:35:40 +00:00
Michael Kuperstein
fb107d8bf0 [X86] Call frame optimization - allow stack-relative movs to be folded into a push
Since we track esp precisely, there's no reason not to allow this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228924 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-12 14:17:35 +00:00
Asiri Rathnayake
b0d513e1eb ARM: Fix another regression introduced in r223113
The changes in r223113 (ARM modified-immediate syntax) have broken
instructions like:
  mov r0, #~0xffffff00
The problem is that I've added a spurious range check on the immediate
operand to ensure that it lies between INT32_MIN and UINT32_MAX. While
this range check is correct in theory, it causes problems because the
operand is stored in an int64_t (by MC). So valid 32-bit constants like
\#~0xffffff00 become out of range. The solution is to simply remove this
range check. It is not possible to validate the range of the immediate
operand with the current setup because: 1) The operand is stored in an
int64_t by MC, 2) The immediate can be of the forms #imm, #-imm, #~imm
or even #((~imm)) etc. So we just chop the value to 32 bits and use it.

Also noted that the original range check was note tested by any of the
unit tests. I've added a new test to cover #~imm kind of operands.

Change-Id: I411e90d84312a2eff01b732bb238af536c4a7599

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228920 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-12 13:37:28 +00:00
Elena Demikhovsky
f41b8e3e49 AVX-512: Fixed the "test" operation for i1 type
Using KORTESTW for comparison i1 value with zero was wrong since the instruction tests 16 bits.
KORTESTW may be used with KSHIFTL+KSHIFTR that clean the 15 upper bits.
I removed (X86cmp i1, 0) pattern and zero-extend i1 to i8 and then use TESTB.

There are some cases where i1 is in the mask register and the upper bits are already zeroed.
Then KORTESTW is the better solution, but it is subject for optimization.
Meanwhile, I'm fixing the correctness issue.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228916 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-12 08:40:34 +00:00
Michael Kuperstein
fd98d3be55 [X86] A heuristic to estimate the size impact for converting stack-relative parameter movs to pushes
This gives a rough estimate of whether using pushes instead of movs is profitable, in terms of size.
We go over all calls in the MachineFunction and compute:
a) For each callsite that can not use pushes, the penalty of not having a reserved call frame.
b) For each callsite that can use pushes, the gain of actually replacing the movs with pushes (and the potential penalty of having to readjust the stack).

Differential Revision: http://reviews.llvm.org/D7561

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228915 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-12 08:36:35 +00:00
Hal Finkel
091acf253b [PowerPC] Mark jumps as expensive (using using CR bits)
On PowerPC, which has a full set of logical operations on (its multiple sets
of) condition-register bits, it is not profitable to break of complex
conditions feeding a jump into multiple jumps. We can turn off this feature of
CGP/SDAGBuilder by marking jumps as "expensive".

P7 test-suite speedups (no regressions):
MultiSource/Benchmarks/FreeBench/pcompress2/pcompress2
	-0.626647% +/- 0.323583%
MultiSource/Benchmarks/Olden/power/power
	-18.2821% +/- 8.06481%

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228895 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-12 01:02:52 +00:00
Tom Stellard
293dfe59a5 R600/SI: Disable subreg liveness
This is temporary while we try to fix a crash in the register coalescer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228861 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-11 18:24:53 +00:00
Tom Stellard
28f550eed1 R600: Split AMDGPUPassConfig into R600PassConfig and GCNPassConfig
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228850 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-11 17:11:51 +00:00