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18 Commits

Author SHA1 Message Date
Jakob Stoklund Olesen
7de1d327f1 Add missing zextloadi1 to i64 patterns. PR16721. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183587 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-06-07 22:55:05 +00:00
Venkatraman Govindaraju
01021a8b93 [Sparc]: Use cmp instruction instead of subcc to compare integers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183463 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-06-07 00:03:36 +00:00
Venkatraman Govindaraju
85cc972a06 Sparc: When storing 0, use %g0 directly in the store instruction instead of 
using two instructions (sethi and store).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183090 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-06-03 00:21:54 +00:00
Venkatraman Govindaraju
65ca7aa57d Sparc: Combine add/or/sethi instruction with restore if possible. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183088 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-06-02 21:48:17 +00:00
Venkatraman Govindaraju
dd48226b15 Sparc: Perform leaf procedure optimization by default 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183083 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-06-02 02:24:27 +00:00
Jakob Stoklund Olesen
89f530ebbf Also expand 64-bit bitcasts. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182229 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-05-20 01:01:43 +00:00
Jakob Stoklund Olesen
5e5b78ca36 Implement spill and fill of I64Regs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182228 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-05-20 00:53:25 +00:00
Jakob Stoklund Olesen
900622e099 Mark i64 SETCC as expand so it is turned into a SELECT_CC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182227 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-05-20 00:28:36 +00:00
Jakob Stoklund Olesen
634123e98d Don't use %g0 to materialize 0 directly. 
The wired physreg doesn't work on tied operands like on MOVXCC.

Add a README note to fix this later.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182225 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-05-19 21:47:13 +00:00
Jakob Stoklund Olesen
00ce0f6512 Handle i64 FrameIndex nodes in SPARC v9 mode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182216 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-05-19 19:14:24 +00:00
Jakob Stoklund Olesen
2c6b5a8d33 Fix the SETHIimm pattern for 64-bit code. 
Don't ignore the high 32 bits of the immediate.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179985 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-21 21:18:03 +00:00
Jakob Stoklund Olesen
ad36608499 Add 64-bit multiply and divide instructions for SPARC v9. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179582 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-16 02:57:02 +00:00
Jakob Stoklund Olesen
d9f88da7b3 Use i32 for all SPARC shift amounts, even in 64-bit mode. 
Test case by llvm-stress.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179477 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-14 05:48:50 +00:00
Jakob Stoklund Olesen
61ed5ddefe Add 64-bit load and store instructions. 
There is only a few new instructions, the rest is handled with patterns.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178528 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-02 04:09:28 +00:00
Jakob Stoklund Olesen
73c5f80ec9 Basic 64-bit ALU operations. 
SPARC v9 extends all ALU instructions to 64 bits, so we simply need to
add patterns to use them for both i32 and i64 values.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178527 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-02 04:09:23 +00:00
Jakob Stoklund Olesen
39e75544dc Materialize 64-bit immediates. 
The last resort pattern produces 6 instructions, and there are still
opportunities for materializing some immediates in fewer instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178526 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-02 04:09:17 +00:00
Jakob Stoklund Olesen
c3ff3f42ee Add 64-bit shift instructions. 
SPARC v9 defines new 64-bit shift instructions. The 32-bit shift right
instructions are still usable as zero and sign extensions.

This adds new F3_Sr and F3_Si instruction formats that probably should
be used for the 32-bit shifts as well. They don't really encode an
simm13 field.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178525 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-02 04:09:12 +00:00
Jakob Stoklund Olesen
f37812e906 Add support for 64-bit calling convention. 
This is far from complete, but it is enough to make it possible to write
test cases using i64 arguments.

Missing features:
- Floating point arguments.
- Receiving arguments on the stack.
- Calls.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178523 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-02 04:09:02 +00:00