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256 Commits

Author SHA1 Message Date
Evan Cheng
a3ca3149f2 Add CopyCost to TargetRegisterClass. This specifies the cost of copying a value 
between two registers in the specific class.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42123 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-19 01:35:01 +00:00
Dan Gohman
0fee3ff93e Add MVT::fAny for overloading intrinsics on floating-point types. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41128 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-16 21:57:19 +00:00
Chandler Carruth
6994040a95 This is the patch to provide clean intrinsic function overloading support in LLVM. It cleans up the intrinsic definitions and generally smooths the process for more complicated intrinsic writing. It will be used by the upcoming atomic intrinsics as well as vector and float intrinsics in the future. 
This also changes the syntax for llvm.bswap, llvm.part.set, llvm.part.select, and llvm.ct* intrinsics. They are automatically upgraded by both the LLVM ASM reader and the bitcode reader. The test cases have been updated, with special tests added to ensure the automatic upgrading is supported.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40807 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-04 01:51:18 +00:00
Christopher Lamb
08d52071ba Add target independent MachineInstr's to represent subreg insert/extract in MBB's. PR1350 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40518 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-26 07:48:21 +00:00
Christopher Lamb
8245510ae0 Teach TableGen about the new vector types. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40513 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-26 06:41:18 +00:00
Evan Cheng
102dc195b6 No need for noResults anymore. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40075 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-20 00:21:23 +00:00
Evan Cheng
64d80e3387 Change instruction description to split OperandList into OutOperandList and 
InOperandList. This gives one piece of important information: # of results
produced by an instruction.
An example of the change:
def ADD32rr  : I<0x01, MRMDestReg, (ops GR32:$dst, GR32:$src1, GR32:$src2),
                 "add{l} {$src2, $dst|$dst, $src2}",
                 [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;
=>
def ADD32rr  : I<0x01, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2),
                 "add{l} {$src2, $dst|$dst, $src2}",
                 [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40033 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-19 01:14:50 +00:00
Dan Gohman
3bf6e183d5 Eliminate an unused parameter. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39828 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-13 20:16:50 +00:00
Evan Cheng
88cc092ca5 Try committing again. Add OptionalDefOperand. Remove clobbersPred. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38498 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-10 18:05:01 +00:00
Evan Cheng
c419bd3396 ImmutablePredicateOperand is no more. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37963 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-06 23:23:38 +00:00
Evan Cheng
8012b077dd Instructions with ImmutablePredicateOperand aren't really predicable since their predicates are fixed at isel time. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37899 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-05 07:19:29 +00:00
Dan Gohman
d45eddd214 Revert the earlier change that removed the M_REMATERIALIZABLE machine 
instruction flag, and use the flag along with a virtual member function
hook for targets to override if there are instructions that are only
trivially rematerializable with specific operands (i.e. constant pool
loads).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37728 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-06-26 00:48:07 +00:00
Dan Gohman
82a87a0172 Replace M_REMATERIALIZIBLE and the newly-added isOtherReMaterializableLoad 
with a general target hook to identify rematerializable instructions. Some
instructions are only rematerializable with specific operands, such as loads
from constant pools, while others are always rematerializable. This hook
allows both to be identified as being rematerializable with the same
mechanism.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37644 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-06-19 01:48:05 +00:00
Evan Cheng
eaa91b0a1f Replace TargetInstrInfo::CanBeDuplicated() with a M_NOT_DUPLICABLE bit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37643 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-06-19 01:26:51 +00:00
Christopher Lamb
a321125e8b Add support to tablegen for specifying subregister classes on a per register class basis. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37572 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-06-13 22:20:15 +00:00
Evan Cheng
b5c1c9c8e3 Add clobbersPred - instruction that clobbers condition code / register which are used to predicate instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37465 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-06-06 10:14:55 +00:00
Dan Gohman
b9daee9ece Remove the operator<< for MVT::ValueType in preparation for MVT::ValueType 
being changed from an enum to an integer type, which can't have a custom
operator<< overload.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37412 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-06-04 16:11:03 +00:00
Evan Cheng
5127ce09a4 Rename M_PREDICATED to M_PREDICABLE; opcode can be specified isPredicable without having a PredicateOperand. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37116 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-16 20:45:24 +00:00
Reid Spencer
c4de3dec62 For PR1297: 
Implement code generation for overloaded intrinsic functions. The basic
difference is that "actual" argument types must be provided when
constructing intrinsic names and types. Also, for recognition, only the
prefix is examined. If it matches, the suffix is assumed to match. The
suffix is checked by the Verifier, however.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35539 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-01 07:20:02 +00:00
Bill Wendling
eebc8a1bc5 Add support for the v1i64 type. This makes better code for this: 
#include <mmintrin.h>

extern __m64 C;

void baz(__v2si *A, __v2si *B)
{
  *A = C;
  _mm_empty();
}

We get this:

_baz:
        call "L1$pb"
"L1$pb":
        popl %eax
        movl L_C$non_lazy_ptr-"L1$pb"(%eax), %eax
        movq (%eax), %mm0
        movl 4(%esp), %eax
        movq %mm0, (%eax)
        emms
        ret

GCC gives us this:

_baz:
        pushl   %ebx
        call    L3
"L00000000001$pb":
L3:
        popl    %ebx
        subl    $8, %esp
        movl    L_C$non_lazy_ptr-"L00000000001$pb"(%ebx), %eax
        movl    (%eax), %edx
        movl    4(%eax), %ecx
        movl    16(%esp), %eax
        movl    %edx, (%eax)
        movl    %ecx, 4(%eax)
        emms
        addl    $8, %esp
        popl    %ebx
        ret


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35351 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-26 07:53:08 +00:00
Evan Cheng
04677a3b49 Recognize target instruction flag 'isReMaterializable'. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35159 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-19 06:20:37 +00:00
Chris Lattner
50d456539d reapply 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34697 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-27 22:08:27 +00:00
Evan Cheng
53c9b3f68c Backing out 
CodeGenTarget.cpp updated: 1.82 -> 1.83
Record.cpp updated: 1.55 -> 1.56
Record.h updated: 1.59 -> 1.60
TableGen.cpp updated: 1.47 -> 1.48
It's missing CallingConvEmitter.h


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34693 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-27 21:44:08 +00:00
Chris Lattner
798dc7adb4 initial support for calling convention generation, still unfinished. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34682 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-27 20:43:37 +00:00
Jim Laskey
a683f9ba13 Files missing from LABEL check in. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33539 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-26 17:29:20 +00:00
Bill Wendling
f5da13367f What should be the last unnecessary <iostream>s in the library. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32333 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-07 22:21:48 +00:00
Evan Cheng
0555122412 Match TargetInstrInfo changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32107 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-01 22:57:41 +00:00
Chris Lattner
f64f9a4b75 Remove the isTwoAddress property from the CodeGenInstruction class. It should 
not be used for anything other than backwards compat constraint handling.

Add support for a new DisableEncoding property which contains a list of
registers that should not be encoded by the generated code emitter.  Convert
the codeemitter generator to use this, fixing some PPC JIT regressions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31769 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-15 23:23:02 +00:00
Chris Lattner
0bb75004ff ADd support for adding constraints to suboperands 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31748 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-15 02:38:17 +00:00
Chris Lattner
f196839562 allow ptr_rc to explicitly appear in an instructions operand list, it doesn't 
have to be a subpart of a complex operand.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31618 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-10 02:01:40 +00:00
Chris Lattner
29434364dd emit TIED_TO correctly 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31484 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-07 01:27:55 +00:00
Chris Lattner
a0cca4ae26 simplify the way operand flags and constraints are handled, making it easier 
to extend.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31481 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-06 23:49:51 +00:00
Chris Lattner
a818e92f8b recognize ppc's blr instruction as predicated 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31480 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-06 21:44:54 +00:00
Evan Cheng
c51737f46f Clean up some code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31451 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-04 09:40:23 +00:00
Chris Lattner
d438b53e76 eliminate need for the NumMIOperands field in Operand. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31432 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-03 23:45:17 +00:00
Evan Cheng
4c2b7a3808 Tied-to constraint must be op_with_larger_idx = op_with_smaller_idx or else throw an exception. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31361 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-01 23:03:11 +00:00
Evan Cheng
e2ba897588 Add operand constraints to TargetInstrInfo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31333 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-01 00:27:05 +00:00
Evan Cheng
94b3040fef Added properties such as SDNPHasChain to ComplexPattern. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30890 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-11 21:02:01 +00:00
Evan Cheng
d7c2c86239 Allow more use of iPTR in patterns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28790 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-15 00:16:37 +00:00
Evan Cheng
764811f145 Don't generate getCalleeSaveReg and getCalleeSaveRegClasses anymore. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28376 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-18 00:08:46 +00:00
Evan Cheng
6b12516f1a Typo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28366 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-17 20:55:51 +00:00
Evan Cheng
2618d07765 Remove PointerType from target definition. Use abstract type MVT::iPTR to 
represent pointer type.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28363 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-17 20:37:59 +00:00
Evan Cheng
44a65fa552 Allow patterns to refer to physical registers that belong to multiple 
register classes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28323 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-16 07:05:30 +00:00
Chris Lattner
4b2362e247 Fix a typo: Instr* -> Intr* 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27568 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-10 22:02:59 +00:00
Chris Lattner
6a160fba22 Only compute intrinsic valuetypes when in a target .td file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27197 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 00:15:00 +00:00
Chris Lattner
76f8c7c4cc revert this, it breaks things. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27196 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 00:03:08 +00:00
Chris Lattner
8850a1bcef Add support for decoding iPTR to the right pointer type. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27188 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-27 22:48:18 +00:00
Chris Lattner
2ca956f8de Make sure to initialize the TheDef field! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27078 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 20:25:01 +00:00
Chris Lattner
43fbbc36dc Move CodeGenIntrinsic implementation to CodeGenTarget.cpp with the rest of 
the CodeGen* implementations.

Parse the MVT::ValueType for each operand of the intrinsics.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27075 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 19:49:31 +00:00
Evan Cheng
dcfccac13b getEnumName() missed v8i8, v4i16, and v2i32 types 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26869 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-19 07:57:34 +00:00