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574 Commits

Author SHA1 Message Date
Quentin Colombet
15d1b85094 [R600] Replicate old DAGCombiner behavior in target specific DAG combine. 
build_vector is lowered to REG_SEQUENCE, which is something the register
allocator does a good job at optimizing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187397 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-07-30 00:27:16 +00:00
Tom Stellard
57e6b2d1f3 SimplifyCFG: Use parallel-and and parallel-or mode to consolidate branch conditions 
Merge consecutive if-regions if they contain identical statements.
Both transformations reduce number of branches.  The transformation
is guarded by a target-hook, and is currently enabled only for +R600,
but the correctness has been tested on X86 target using a variety of
CPU benchmarks.

Patch by: Mei Ye

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187278 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-07-27 00:01:07 +00:00
Tom Stellard
1f67c63cb2 DAGCombiner: Pass the correct type to TargetLowering::isF(Abs|Neg)Free 
This commit also implements these functions for R600 and removes a test
case that was relying on the buggy behavior.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187007 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-07-23 23:55:03 +00:00
Tom Stellard
8ea83d4999 R600: Treat CONSTANT_ADDRESS loads like GLOBAL_ADDRESS loads when necessary 
These are really the same address space in hardware.  The only
difference is that CONSTANT_ADDRESS uses a special cache for faster
access.  When we are unable to use the constant kcache for some reason
(e.g. smaller types or lack of indirect addressing) then the instruction
selector must use GLOBAL_ADDRESS loads instead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187006 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-07-23 23:54:56 +00:00
Tom Stellard
10205d5a73 R600: Add support for 24-bit MAD instructions 
Reviewed-by: Vincent Lejeune <vljn at ovi.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186923 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-07-23 01:48:49 +00:00
Tom Stellard
3f5d63b956 R600: Add support for 24-bit MUL instructions 
Reviewed-by: Vincent Lejeune <vljn at ovi.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186922 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-07-23 01:48:42 +00:00
Tom Stellard
eb643b9b37 R600: Improve support for < 32-bit loads 
Reviewed-by: Vincent Lejeune <vljn at ovi.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186921 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-07-23 01:48:35 +00:00
Tom Stellard
20027547b9 R600: Rename AMDILISelDAGToDAG.cpp -> AMDGPUISelDAGToDAG.cpp 
Reviewed-by: Vincent Lejeune <vljn at ovi.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186920 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-07-23 01:48:29 +00:00
Tom Stellard
58d3335cb9 R600: Move CONST_ADDRESS folding into AMDGPUDAGToDAGISel::Select() 
This increases the number of opportunites we have for folding.  With the
previous implementation we were unable to fold into any instructions
other than the first when multiple instructions were selected from a
single SDNode.

Reviewed-by: Vincent Lejeune <vljn at ovi.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186919 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-07-23 01:48:24 +00:00
Tom Stellard
a7eea0568c R600: Use KCache for kernel arguments 
Reviewed-by: Vincent Lejeune <vljn at ovi.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186918 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-07-23 01:48:18 +00:00
Tom Stellard
125f9d0ca2 R600: Simplify assembly for KCache registers using the TableGen !add operator 
Before:

MOV * T0.W, KC0[131-128].Y

After:

MOV * T0.W, KC0[3].Y

Reviewed-by: Vincent Lejeune <vljn at ovi.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186917 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-07-23 01:48:08 +00:00
Tom Stellard
f502c292f6 R600: Use the same compute kernel calling convention for all GPUs 
A side-effect of this is that now the compiler expects kernel arguments
to be 4-byte aligned.

Reviewed-by: Vincent Lejeune <vljn at ovi.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186916 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-07-23 01:48:05 +00:00
Tom Stellard
5864284d71 R600: Use correct LoadExtType when lowering kernel arguments 
Reviewed-by: Vincent Lejeune <vljn at ovi.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186915 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-07-23 01:47:58 +00:00
Tom Stellard
2bb20fd2bf R600: Clean up extended load patterns 
Reviewed-by: Vincent Lejeune <vljn at ovi.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186914 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-07-23 01:47:52 +00:00
Tom Stellard
d7a472c9c6 R600: Expand vector FNEG 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186913 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-07-23 01:47:46 +00:00
Vincent Lejeune
272458bd06 R600: Don't emit empty then clause and use alu_pop_after 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186725 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-07-19 21:45:15 +00:00
Vincent Lejeune
12140450fa R600: Simplify AMDILCFGStructurize by removing templates and assuming single exit 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186724 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-07-19 21:45:06 +00:00
Vincent Lejeune
9e8ba2b193 R600: Replace legacy debug code in AMDILCFGStructurizer.cpp 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186723 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-07-19 21:44:56 +00:00
Tom Stellard
4e518fd941 R600/SI: Fix crash with VSELECT 
https://bugs.freedesktop.org/show_bug.cgi?id=66175

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186616 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-07-18 21:43:53 +00:00
Tom Stellard
ac85f3f65c R600/SI: Add support for v2f32 loads 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186615 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-07-18 21:43:48 +00:00
Tom Stellard
fc047278c1 R600/SI: Add support for v2f32 stores 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186614 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-07-18 21:43:42 +00:00
Tom Stellard
f5660aab41 R600: Expand VSELECT for all types 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186613 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-07-18 21:43:35 +00:00
Craig Topper
f5eea52983 Move string pointer from being a static class member to just a static global in the one file its needed in. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186476 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-07-17 00:31:35 +00:00
Craig Topper
4172a8abba Add 'const' qualifiers to static const char* variables. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186371 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-07-16 01:17:10 +00:00
Tom Stellard
cd0f245864 R600/SI: Add support for 64-bit loads 
https://bugs.freedesktop.org/show_bug.cgi?id=65873

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186339 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-07-15 19:00:09 +00:00
Craig Topper
787e71df69 Make some arrays 'static const' 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186307 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-07-15 06:39:13 +00:00
Craig Topper
b9df53a40b Use llvm::array_lengthof to replace sizeof(array)/sizeof(array[0]). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186301 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-07-15 04:27:47 +00:00
Craig Topper
a0ec3f9b7b Use SmallVectorImpl& instead of SmallVector to avoid repeating small vector size. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186274 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-07-14 04:42:23 +00:00
Benjamin Kramer
795740b591 R600: Remove unsafe type punning. No intended functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186196 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-07-12 20:18:05 +00:00
Tom Stellard
c9c322cc39 R600/SI: Add support for f64 kernel arguments 
Patch by: Niels Ole Salscheider

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186182 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-07-12 18:15:26 +00:00
Tom Stellard
97781281ca R600/SI: Implement select and compares for SI 
Patch by: Niels Ole Salscheider

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186181 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-07-12 18:15:19 +00:00
Tom Stellard
513fc45629 R600/SI: Add fsqrt pattern for SI 
Patch by: Niels Ole Salscheider

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186180 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-07-12 18:15:13 +00:00
Tom Stellard
d2442c10f9 R600/SI: Add double precision fsub pattern for SI 
Patch by: Niels Ole Salscheider

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186179 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-07-12 18:15:08 +00:00
Tom Stellard
54453c11b4 R600/SI: SI support for 64bit ConstantFP 
Patch by: Niels Ole Salscheider

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186178 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-07-12 18:15:02 +00:00
Tom Stellard
68e1328662 R600/SI: Add initial double precision support for SI 
Patch by: Niels Ole Salscheider

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186177 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-07-12 18:14:56 +00:00
Aaron Ballman
80095e5f8e Replacing an empty switch with its moral equivalent. No functional changes intended. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186017 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-07-10 17:19:22 +00:00
Michel Danzer
a3e39dc705 R600/SI: Initial local memory support 
Enough for the radeonsi driver to use it for calculating derivatives.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186012 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-07-10 16:37:07 +00:00
Michel Danzer
5b388cac7f R600/SI: Add pattern for the AMDGPU.barrier.local intrinsic 
lit test coverage to follow in the next commit.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186011 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-07-10 16:36:57 +00:00
Michel Danzer
0a9e22b863 R600/SI: Add intrinsic for retrieving the current thread ID 
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186010 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-07-10 16:36:52 +00:00
Michel Danzer
7740daa8ba R600/SI: Initial support for LDS/GDS instructions 
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186009 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-07-10 16:36:43 +00:00
Michel Danzer
0a9aaacd72 R600/SI: Add intrinsics for texture sampling with user derivatives 
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186008 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-07-10 16:36:36 +00:00
Vincent Lejeune
f2cfef8172 R600: Do not predicated basic block with multiple alu clause 
Test is not included as it is several 1000 lines long.
To test this functionnality, a test case must generate at least 2 ALU clauses,
where an ALU clause is ~110 instructions long.

NOTE: This is a candidate for the stable branch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185943 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-07-09 15:03:33 +00:00
Vincent Lejeune
f4bdec2ebe R600: Fix a rare bug where swizzle optimization returns wrong values 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185942 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-07-09 15:03:25 +00:00
Vincent Lejeune
07bb3f1d0a R600: Fix wrong export reswizzling 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185941 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-07-09 15:03:19 +00:00
Vincent Lejeune
c6f13db656 R600: Use DAG lowering pass to handle fcos/fsin 
NOTE: This is a candidate for the stable branch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185940 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-07-09 15:03:11 +00:00
Vincent Lejeune
f79b9b8593 R600: Print Export Swizzle 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185939 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-07-09 15:03:03 +00:00
Craig Topper
365ef0b197 Use SmallVectorImpl::iterator/const_iterator instead of SmallVector to avoid specifying the vector size. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185540 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-07-03 15:07:05 +00:00
Rafael Espindola
a3863ea2da Remove address spaces from MC. 
This is dead code since PIC16 was removed in 2010. The result was an odd mix,
where some parts would carefully pass it along and others would assert it was
zero (most of the object streamer for example).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185436 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-07-02 15:49:13 +00:00
Chad Rosier
bde84a96ea Add a newline. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185385 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-07-01 21:31:10 +00:00
Vincent Lejeune
c36a8d2b3d R600: Fix an unitialized variable in R600InstrInfo.cpp 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185294 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-06-30 21:44:06 +00:00