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586 Commits

Author SHA1 Message Date
Chris Lattner
63079f0757 Fold comparisons against a constant nan, and optimize ORD/UNORD 
comparisons with a constant.  This allows us to compile isnan to:

_foo:
	fcmpu cr7, f1, f1
	mfcr r2
	rlwinm r3, r2, 0, 31, 31
	blr 

instead of:

LCPI1_0:					;  float
	.space	4
_foo:
	lis r2, ha16(LCPI1_0)
	lfs f0, lo16(LCPI1_0)(r2)
	fcmpu cr7, f1, f0
	mfcr r2
	rlwinm r3, r2, 0, 31, 31
	blr 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45405 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-12-29 08:37:08 +00:00
Chris Lattner
69bfbdfaee this xform is implemented. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45404 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-12-29 08:19:39 +00:00
Chris Lattner
d60eedca01 Codegen: 
as:

_bar:
	pushl	%esi
	subl	$8, %esp
	movl	16(%esp), %esi
	call	L_foo$stub
	fstps	(%esi)
	addl	$8, %esp
	popl	%esi
	#FP_REG_KILL
	ret

instead of:

_bar:
	pushl	%esi
	subl	$8, %esp
	movl	16(%esp), %esi
	call	L_foo$stub
	fstpl	(%esi)
	cvtsd2ss	(%esi), %xmm0
	movss	%xmm0, (%esi)
	addl	$8, %esp
	popl	%esi
	#FP_REG_KILL
	ret



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45401 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-12-29 06:57:38 +00:00
Chris Lattner
112dedc520 avoid going through a stack slot to convert from fpstack to xmm reg 
if we are just going to store it back anyway.  This improves things 
like:
double foo();
void bar(double *P) { *P = foo(); }



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45399 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-12-29 06:41:28 +00:00
Chris Lattner
8d2a922814 one fewer uncond branch with my codegenprepare hack for single-mbb backedges. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45360 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-12-26 17:23:47 +00:00
Evan Cheng
636e5a216c Fix PR1872: SrcValue and SrcValueOffset should not be used to compute load / store node id. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45167 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-12-18 19:38:14 +00:00
Evan Cheng
beec823d4b FIX for PR1799: When a load is unfolded from an instruction, check if it is a new node. If not, do not create a new SUnit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45157 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-12-18 08:42:10 +00:00
Evan Cheng
7a831ce85f Make better use of instructions that clear high bits; fix various 2-wide shuffle bugs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45058 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-12-15 03:00:47 +00:00
Evan Cheng
152804e9c1 Fix ctlz and cttz. llvm definition requires them to return number of bits in of the src type when value is zero. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45029 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-12-14 08:30:15 +00:00
Evan Cheng
18efe269b1 Implement ctlz and cttz with bsr and bsf. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45024 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-12-14 02:13:44 +00:00
Evan Cheng
f9785f92b6 Be extra careful with extension use optimation. Now turned on by default. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44981 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-12-13 03:32:53 +00:00
Evan Cheng
1314b00cf2 Fold some and + shift in x86 addressing mode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44970 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-12-13 00:43:27 +00:00
Evan Cheng
6e141fd048 Implicit def instructions, e.g. X86::IMPLICIT_DEF_GR32, are always re-materializable and they should not be spilled. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44960 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-12-12 23:12:09 +00:00
Dan Gohman
890813243f Allow vector integer constants to be created with 
SelectionDAG::getConstant, in the same way as vector floating-point
constants. This allows the legalize expansion code for @llvm.ctpop and
friends to be usable with vector types.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44954 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-12-12 22:21:26 +00:00
Evan Cheng
794405e6aa Use shuffles to implement insert_vector_elt for i32, i64, f32, and f64. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44929 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-12-12 07:55:34 +00:00
Evan Cheng
2044bccd1a Add a test case for -optimize-ext-uses. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44928 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-12-12 07:54:08 +00:00
Evan Cheng
db2d524d5f Lower a build_vector with all constants into a constpool load unless it can be done with a move to low part. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44921 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-12-12 06:45:40 +00:00
Evan Cheng
14b32e1941 - Improved v8i16 shuffle lowering. It now uses pshuflw and pshufhw as much as 
possible before resorting to pextrw and pinsrw.
- Better codegen for v4i32 shuffles masquerading as v8i16 or v16i8 shuffles.
- Improves (i16 extract_vector_element 0) codegen by recognizing
  (i32 extract_vector_element 0) does not require a pextrw.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44836 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-12-11 01:46:18 +00:00
Christopher Lamb
11a4f64bd4 Improve branch folding by recgonizing that explict successor relationships impact the value of fall-through choices. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44785 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-12-10 07:24:06 +00:00
Evan Cheng
8a86c3f3ae Much improved v8i16 shuffles. (Step 1). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44676 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-12-07 08:07:39 +00:00
Evan Cheng
a97159336d New test case. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44672 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-12-07 01:48:46 +00:00
Evan Cheng
b0e370abdf Fix a bogus test case. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44668 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-12-06 22:12:45 +00:00
Evan Cheng
33faddc35d Turning simple splitting on. Start testing new coalescer heuristics as new llcbeta. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44660 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-12-06 08:54:31 +00:00
Chris Lattner
d3fd6d2b25 third time around: instead of disabling this completely, 
only disable it if we don't know it will be obviously profitable.
Still fixme, but less so. :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44658 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-12-06 07:47:55 +00:00
Chris Lattner
e00cbad78d Actually, disable this code for now. More analysis and improvements to 
the X86 backend are needed before this should be enabled by default.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44657 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-12-06 07:44:31 +00:00
Chris Lattner
e70da20f9a implement a readme entry, compiling the code into: 
_foo:
	movl	$12, %eax
	andl	4(%esp), %eax
	movl	_array(%eax), %eax
	ret

instead of:

_foo:
	movl	4(%esp), %eax
	shrl	$2, %eax
	andl	$3, %eax
	movl	_array(,%eax,4), %eax
	ret

As it turns out, this triggers all the time, in a wide variety of
situations, for example, I see diffs like this in various programs:

-       movl    8(%eax), %eax
-       shll    $2, %eax
-       andl    $1020, %eax
-       movl    (%esi,%eax), %eax
+       movzbl  8(%eax), %eax
+       movl    (%esi,%eax,4), %eax


-       shll    $2, %edx
-       andl    $1020, %edx
-       movl    (%edi,%edx), %edx
+       andl    $255, %edx
+       movl    (%edi,%edx,4), %edx

Unfortunately, I also see stuff like this, which can be fixed in the
X86 backend:

-       andl    $85, %ebx
-       addl    _bit_count(,%ebx,4), %ebp
+       shll    $2, %ebx
+       andl    $340, %ebx
+       addl    _bit_count(%ebx), %ebp



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44656 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-12-06 07:33:36 +00:00
Chris Lattner
7f3a75a529 fix this when run on non x86 hosts. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44645 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-12-06 01:05:52 +00:00
Evan Cheng
e62f97c094 Allow some reloads to be folded in multi-use cases. Specifically testl r, r -> cmpl [mem], 0. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44479 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-12-01 02:07:52 +00:00
Evan Cheng
cddbb83ea8 Do not fold reload into an instruction with multiple uses. It issues one extra load. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44467 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-11-30 21:23:43 +00:00
Dan Gohman
b51947817d Remove unnecessary && from the RUN lines of this test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44342 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-11-27 00:03:38 +00:00
Dan Gohman
77003040b2 Don't lower srem/urem X%C to X-X/C*C unless the division is actually 
optimized. This avoids creating illegal divisions when the combiner is
running after legalize; this fixes PR1815. Also, it produces better
code in the included testcase by avoiding the subtract and multiply
when the division isn't optimized.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44341 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-11-26 23:46:11 +00:00
Chris Lattner
8a594489bf Fix a long standing deficiency in the X86 backend: we would 
sometimes emit "zero" and "all one" vectors multiple times,
for example:

_test2:
	pcmpeqd	%mm0, %mm0
	movq	%mm0, _M1
	pcmpeqd	%mm0, %mm0
	movq	%mm0, _M2
	ret

instead of:

_test2:
	pcmpeqd	%mm0, %mm0
	movq	%mm0, _M1
	movq	%mm0, _M2
	ret

This patch fixes this by always arranging for zero/one vectors
to be defined as v4i32 or v2i32 (SSE/MMX) instead of letting them be
any random type.  This ensures they get trivially CSE'd on the dag.
This fix is also important for LegalizeDAGTypes, as it gets unhappy
when the x86 backend wants BUILD_VECTOR(i64 0) to be legal even when
'i64' isn't legal.

This patch makes the following changes:

1) X86TargetLowering::LowerBUILD_VECTOR now lowers 0/1 vectors into
   their canonical types.
2) The now-dead patterns are removed from the SSE/MMX .td files.
3) All the patterns in the .td file that referred to immAllOnesV or
   immAllZerosV in the wrong form now use *_bc to match them with a
   bitcast wrapped around them.
4) X86DAGToDAGISel::SelectScalarSSELoad is generalized to handle 
   bitcast'd zero vectors, which simplifies the code actually.
5) getShuffleVectorZeroOrUndef is updated to generate a shuffle that
   is legal, instead of generating one that is illegal and expecting
   a later legalize pass to clean it up.
6) isZeroShuffle is generalized to handle bitcast of zeros.
7) several other minor tweaks.

This patch is definite goodness, but has the potential to cause random
code quality regressions.  Please be on the lookout for these and let 
me know if they happen.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44310 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-11-25 00:24:49 +00:00
Chris Lattner
9a5bdad0cc upgrade this test 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44298 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-11-24 05:39:29 +00:00
Dan Gohman
089617d9e3 Add support in SplitVectorOp for remainder operators. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44233 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-11-19 15:15:03 +00:00
Chris Lattner
ef6c875dfa fix bogus test that the more strict lexer is finding. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44216 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-11-18 18:26:45 +00:00
Evan Cheng
6542481a6d Typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44196 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-11-16 23:55:08 +00:00
Evan Cheng
5d446265c7 Fix a thinko in post-allocation coalescer. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44166 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-11-15 08:13:29 +00:00
Anton Korobeynikov
9de1934099 Fix PIC jump table codegen on x86-32/linux. In fact, such thing should be applied 
to all targets uses GOT-relative offsets for PIC (Alpha?)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44108 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-11-14 09:18:41 +00:00
Arnold Schwaighofer
38ada868f2 Update tailcall code to include inline attribute operand for memcpy. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43978 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-11-10 10:48:01 +00:00
Evan Cheng
9858c348d7 Fix tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43961 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-11-09 20:46:00 +00:00
Evan Cheng
4471194d69 If both parts of smul_lohi, etc. are used, don't simplify. If only one part is used, try simplify it. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43888 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-11-08 09:25:29 +00:00
Evan Cheng
1fd15ba961 Add pseudo dependency to force two-address instruction to be scheduled after 
other uses. There was a overly restricted check that prevented some obvious
cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43762 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-11-06 08:44:59 +00:00
Dan Gohman
80176319f3 Add support for vector remainder operations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43744 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-11-05 23:35:22 +00:00
Dale Johannesen
eb57ea7ea2 Make labels work in asm blocks; allow labels as 
parameters.  Rename ValueRefList to ParamList
in AsmParser, since its only use is for parameters.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43734 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-11-05 21:20:28 +00:00
Evan Cheng
5942efb0e5 Handle cases where a register and one of its super-register are both marked as 
defined on the same instruction. This fixes PR1767.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43699 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-11-05 03:11:55 +00:00
Evan Cheng
801e5a98bf Fix test case. Chris didn't do make check. :-) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43698 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-11-05 03:04:26 +00:00
Evan Cheng
8dec727c1f Doh. PR1187 -> PR1766. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43693 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-11-05 01:00:44 +00:00
Evan Cheng
5f5f3b6333 Fix PR1187. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43692 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-11-05 00:59:10 +00:00
Chris Lattner
fe6575c2bf Fix PR1761 by not printing (rip) suffix when in -static mode. 
Evan, please review this.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43680 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-11-04 19:23:28 +00:00
Chris Lattner
03e6c7091e Fix PR1763 by allowing the 'q' constraint to work with 64-bit 
regs on x86-64.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43669 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-11-04 06:51:12 +00:00