since some m. instr. may be generated by LLVM instrs. in other blocks.
Handle non-SSA (anti and output) edges and true edges uniformly by
working with machine instructions alone.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1269 91177308-0d34-0410-b5e6-96231b3b80d8
This wasn't a problem until we started putting copies for Phi values
that produced cycles in the SchedGraph!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1254 91177308-0d34-0410-b5e6-96231b3b80d8
are now found as part of the initial walk of the machine code).
Also memory load/store instructions can be generated for non-memory
LLVM instructions, which wasn't handled before. It is now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1199 91177308-0d34-0410-b5e6-96231b3b80d8
Avoids having to handle some special cases that cause complex interactions
with instr. selection.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1138 91177308-0d34-0410-b5e6-96231b3b80d8
from the value itself (the one causing an edge) because the latter may be
a temporary used within the instruction sequence for the VM instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@858 91177308-0d34-0410-b5e6-96231b3b80d8
Value to a vector instead of a list.
Move SchedGraph.h & SchedPriorities.h into lib/CodeGen/InstrScheduling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@572 91177308-0d34-0410-b5e6-96231b3b80d8
