Commit Graph

87 Commits

Author SHA1 Message Date
a43abd102f Fix FastISel to not initialize the PIC-base register multiple times
in functions with PIC references from more than one basic block.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56807 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-29 21:55:50 +00:00
33134c4a75 FastISel support for debug info.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56610 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-25 17:05:24 +00:00
d57dd5f4e6 Arrange for FastISel code to have access to the MachineModuleInfo
object. This will be needed to support debug info.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56508 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-23 21:53:34 +00:00
0586d91bb3 Add X86FastISel support for static allocas, and refences
to static allocas. As part of this change, refactor the
address mode code for laods and stores.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56066 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-10 20:11:02 +00:00
59fbc80f6b Fix a constant lowering bug. Now we can do load and store instructions with funky getelementptr embedded in the address operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55975 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-09 01:26:59 +00:00
9c7216f984 Rename method.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55853 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-05 20:49:33 +00:00
40b189e4e2 FastISel support for ConstantExprs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55843 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-05 18:18:20 +00:00
95267a1e67 Add initial support for selecting constant materializations that require constant
pool loads on X86 in fast isel.  This isn't actually used yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55814 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-05 00:06:23 +00:00
104e4ce162 Do trivial local CSE for constants and other non-Instruction values
in FastISel.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55748 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-03 23:32:19 +00:00
3df24e667f Create HandlePHINodesInSuccessorBlocksFast, a version of
HandlePHINodesInSuccessorBlocks that works FastISel-style. This
allows PHI nodes to be updated correctly while using FastISel.

This also involves some code reorganization; ValueMap and
MBBMap are now members of the FastISel class, so they needn't
be passed around explicitly anymore. Also, SelectInstructions
is changed to SelectInstruction, and only does one instruction
at a time.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55746 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-03 23:12:08 +00:00
ea09f4f469 Make UpdateValueMap, createResultReg, etc. protected instead of private so they can used by target hooks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55691 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-03 06:43:10 +00:00
cc54e76cc6 Fix an issue where a use might be selected before a def, and then we didn't respect the pre-chosen vreg
assignment when selecting the def.  This is the naive solution to the problem: insert a copy to the pre-chosen
vreg.  Other solutions might be preferable, such as:
  1) Passing the dest reg into FastEmit_.  However, this would require the higher level code to know about reg classes, which they don't currently.
  2) Selecting blocks in reverse postorder.  This has some compile time cost for computing the order, and we'd need to measure its impact.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55555 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-30 00:38:46 +00:00
99b218218c Add a target callback for FastISel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55512 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28 23:21:34 +00:00
40a468f249 FastEmitInst_extractsubreg doesn't need to be passed the register class. It can get it from MachineRegisterInfo instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55476 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28 17:47:37 +00:00
8970f00def Add a helper method that will be used to support EXTRACT_SUBREG for selecting trunc's in fast-isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55439 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-27 22:30:02 +00:00
ad368ac2b5 Add a new FastISel method, getRegForValue, which takes care of
the details of materializing constants and other values into
registers, and make use of it in several places.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55426 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-27 18:10:19 +00:00
10df0fa73e Basic FastISel support for floating-point constants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55401 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-27 01:09:54 +00:00
d0533c9998 Factor out a large amoutn of the cast handling code in fast isel into helper methods.
This simultaneously makes the code simpler and adds support for sext as well.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55398 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-26 23:46:32 +00:00
763d89343b Refactor the bitcast code into its own function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55387 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-26 21:28:54 +00:00
0f84e4e310 Add a RetVT parameter to emitted FastISel methods, so that we will be able to pass the desired return
type down.  This is not currently used.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55345 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-25 23:58:18 +00:00
6d0c25ec3a Add support for fast isel of (integer) immediate materialization pattens, and use them to support
bitcast of constants in fast isel.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55325 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-25 20:20:32 +00:00
6ecf50908c Make MBBMap a DenseMap instead of a std::map.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55220 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-23 02:44:46 +00:00
3c8f36fd03 Reapply r55191 and r55192.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55205 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-22 21:28:19 +00:00
449416deb6 Reverting r55190, r55191, and r55192. They broke the build with this error message:
{standard input}:17:bad register name `%sil'
make[4]: *** [libgcc/./_addvsi3.o] Error 1
make[4]: *** Waiting for unfinished jobs....
{standard input}:23:bad register name `%dil'
{standard input}:28:bad register name `%dil'
make[4]: *** [libgcc/./_addvdi3.o] Error 1
{standard input}:18:bad register name `%sil'
make[4]: *** [libgcc/./_subvsi3.o] Error 1



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55200 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-22 20:51:05 +00:00
e0182ec0e4 Support non-fallthrough unconditional branches in FastISel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55191 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-22 19:21:41 +00:00
a794ef7f5d Fix typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55189 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-22 18:26:07 +00:00
22bb31103d Factor out the predicate check code from DAGISelEmitter.cpp
and use it in FastISelEmitter.cpp, and make FastISel
subtarget aware. Among other things, this lets it work
properly on x86 targets that don't have SSE, where it
successfully selects x87 instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55156 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-22 00:20:26 +00:00
d5fe57d2f9 Basic fast-isel support for instructions with constant int operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55099 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-21 01:41:07 +00:00
7f92ebddd2 Improve the doxygen comment for SelectInstructions::SelectInstructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55094 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-21 00:19:43 +00:00
c7f72de3b4 Begin making more use of the FastISelEmitter class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55093 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-21 00:19:05 +00:00
83785c8096 First cut, un-optimized (and untested) fast isel lowering of GetElementPtrInst.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55085 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-20 22:45:34 +00:00
bb466331e7 Simplify FastISel's constructor argument list, make the FastISel
class hold a MachineRegisterInfo member, and make the
MachineBasicBlock be passed in to SelectInstructions rather
than the FastISel constructor.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55076 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-20 21:05:57 +00:00
cc8430f742 Fix a leak in the FastISel code that Chris pointed out.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55031 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-20 00:56:17 +00:00
bdedd44773 Add FastISel support for several more binary operators.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55020 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-20 00:11:48 +00:00
40610241d0 Fix the FastISel class' doxygen comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54957 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-18 23:41:46 +00:00
e285a74f7c Make FastISel's constructor protected, and give it a destructor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54793 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-14 21:51:29 +00:00
b0cf29c5cf Initial checkin of the new "fast" instruction selection support. See
the comments in FastISelEmitter.cpp for details on what this is.
This is currently experimental and unusable.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54751 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-13 20:19:35 +00:00