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100 Commits

Author SHA1 Message Date
Evan Cheng
9f7f49caa4 Silence a bogus compiler warning. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33145 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-12 22:30:07 +00:00
Reid Spencer
a54b7cbd45 For PR1064: 
Implement the arbitrary bit-width integer feature. The feature allows
integers of any bitwidth (up to 64) to be defined instead of just 1, 8,
16, 32, and 64 bit integers.

This change does several things:
1. Introduces a new Derived Type, IntegerType, to represent the number of
   bits in an integer. The Type classes SubclassData field is used to
   store the number of bits. This allows 2^23 bits in an integer type.
2. Removes the five integer Type::TypeID values for the 1, 8, 16, 32 and
   64-bit integers. These are replaced with just IntegerType which is not
   a primitive any more.
3. Adjust the rest of LLVM to account for this change.

Note that while this incremental change lays the foundation for arbitrary
bit-width integers, LLVM has not yet been converted to actually deal with
them in any significant way. Most optimization passes, for example, will
still only deal with the byte-width integer types.  Future increments
will rectify this situation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33113 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-12 07:05:14 +00:00
Evan Cheng
56966225d1 Store default libgcc routine names and allow them to be redefined by target. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33105 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-12 02:11:51 +00:00
Reid Spencer
4fe16d607d Rename BoolTy as Int1Ty. Patch by Sheng Zhou. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33076 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-11 18:21:29 +00:00
Evan Cheng
257464a072 - Remove isSetCCExpensive() etc. These are no longer used. 
- Add isSelectExpensive() etc. It's used to tell codegen that select is expensive for a given target, avoid using it if possible. Currently it's only
used to expand FCOPYSIGN.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32939 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-05 23:31:08 +00:00
Reid Spencer
2ba767f44a For PR950: 
Change integer type names for signless integer types


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32777 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-31 05:23:18 +00:00
Evan Cheng
975651ab98 Add getTypeToExpandTo() which recursively walks TransformToType to determine 
the intrinsic type to expand to.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32558 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-13 20:52:00 +00:00
Evan Cheng
6586adfc1a Update comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32532 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-13 06:12:35 +00:00
Evan Cheng
b9d89c9ffb Update comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32531 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-13 06:09:03 +00:00
Anton Korobeynikov
d27a258d2d Cleaned setjmp/longjmp lowering interfaces. Now we're producing right 
code (both asm & cbe) for Mingw32 target.
Removed autoconf checks for underscored versions of setjmp/longjmp.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32415 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-10 23:12:42 +00:00
Evan Cheng
5ff839fbab Add a mechanism to specify whether a target supports a particular indexed load / store. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31597 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-09 18:56:43 +00:00
Evan Cheng
144d8f09e1 Rename ISD::MemOpAddrMode to ISD::MemIndexedMode 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31595 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-09 17:55:04 +00:00
Evan Cheng
d258efaf6e getPostIndexedAddressParts change: passes in load/store instead of its loaded / stored VT. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31584 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-09 04:29:46 +00:00
Evan Cheng
a7bb6498fe Added target hook for post-indexed memory ops transformation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31499 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-07 09:04:16 +00:00
Evan Cheng
1a854be352 Rename 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31413 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-03 07:21:16 +00:00
Evan Cheng
24d9cf025d Added a target specific hook to check whether / how a node can be transformed 
into a pair of base / offset nodes for pre-indexed load / store ops.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31407 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-03 03:04:06 +00:00
Chris Lattner
a74b4a3ddc generalize this api 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31365 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-02 01:39:10 +00:00
Chris Lattner
dba1aeedd8 Change the prototype for TargetLowering::isOperandValidForConstraint 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31318 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-31 19:40:43 +00:00
Evan Cheng
8b2794aeff Merge ISD::TRUNCSTORE to ISD::STORE. Switch to using StoreSDNode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30945 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-13 21:14:26 +00:00
Evan Cheng
24446e253a Merging ISD::LOAD and ISD::LOADX. Added LoadSDNode to represent load nodes. 
Chain and address ptr remains as operands. SrcValue, extending mode, extending
VT (or rather loaded VT before extension) are now instance variables of
LoadSDNode.

Introduce load / store addressing modes to represent pre- and post-indexed
load and store. Also added an additional operand offset that is only used in
post-indexed mode (i.e. base ptr += offset after load/store).

Added alignment info (not yet used) and isVolatile fields.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30843 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-09 20:55:20 +00:00
Chris Lattner
428e75eaef Add support for targets to declare that they use a GOT 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30777 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-06 22:46:34 +00:00
Evan Cheng
c548428c5d Combine ISD::EXTLOAD, ISD::SEXTLOAD, ISD::ZEXTLOAD into ISD::LOADX. Add an 
extra operand to LOADX to specify the exact value extension type.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30714 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-04 00:56:09 +00:00
Duraid Madina
2a0013f59f add setJumpBufSize() and setJumpBufAlignment() to target-lowering. 
Call these from your backend to enjoy setjmp/longjmp goodness, see
lib/Target/IA64/IA64ISelLowering.cpp for an example


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30095 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-04 06:21:35 +00:00
Andrew Lenharth
232c910b8a Start on my todo list 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28752 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-12 16:07:18 +00:00
Reid Spencer
19b7e0e0ca For PR786: 
Minor tweaks in public headers and a few .cpp files so that LLVM can build
successfully with -pedantic and projects using LLVM with -pedantic don't
get warnings from LLVM. There's still more -pedantic warnings to fix.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28453 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-24 19:21:13 +00:00
Evan Cheng
7e399c14ab Another typo. Pointed out by Nate Begeman. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28353 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-17 18:22:14 +00:00
Evan Cheng
5beaacc189 Fix a mis-leading comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28350 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-17 18:08:20 +00:00
Chris Lattner
6cacaee724 There is now a default impl of this method 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28336 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-16 22:52:11 +00:00
Andrew Lenharth
dae9cbe8d4 Move this code to a common place 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28329 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-16 17:42:15 +00:00
Chris Lattner
a0d513ba75 Add some new methods for computing sign bit information. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28144 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-06 09:26:22 +00:00
Owen Anderson
a69571c799 Refactor TargetMachine, pushing handling of TargetData into the target-specific subclasses. This has one caller-visible change: getTargetData() now returns a pointer instead of a reference. 
This fixes PR 759.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28074 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-03 01:29:57 +00:00
Evan Cheng
c313c66a88 Added a virtual method isVectorClearMaskLegal to TLI. It is similar to 
isShuffleMaskLegal, used to determine if it makes sense to turn a
"vector clear" (e.g. pand V, <0, -1, 0, -1> to a shuffle of the vector and
a zero vector.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27873 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-20 08:54:13 +00:00
Chris Lattner
b878151b1e Provide a default impl of LowerArguments 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27605 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-12 16:21:12 +00:00
Chris Lattner
c45420ddd2 Move isShuffleLegal from TLI to Legalize. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27398 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-04 17:21:22 +00:00
Chris Lattner
e6bfffbae2 Allow targets to have fine grained control over which types various ops get 
promoted to, if they desire.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27389 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-04 00:25:10 +00:00
Chris Lattner
79227e2906 Modify the TargetLowering::getPackedTypeBreakdown method to also return the 
unpromoted element type.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27273 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 00:46:36 +00:00
Chris Lattner
00cc494595 Add a method useful for decimating vectors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27269 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 00:28:23 +00:00
Evan Cheng
ca6e8eafd2 Added a ValueType operand to isShuffleMaskLegal(). For now, x86 will not do 
64-bit vector shuffle.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26964 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-22 22:07:06 +00:00
Chris Lattner
dc26e32ec7 Add some helper methods 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26882 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-20 00:55:52 +00:00
Evan Cheng
714554d707 Added a way for TargetLowering to specify what values can be used as the 
scale component of the target addressing mode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26802 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-16 21:47:42 +00:00
Evan Cheng
30b37b5f29 Add LSR hooks. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26740 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-13 23:18:16 +00:00
Chris Lattner
1566d18fe2 custom lowered nodes are legal too 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26561 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-05 23:49:19 +00:00
Evan Cheng
33143dce15 Number of NodeTypes now exceeds 128. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26503 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-03 06:58:59 +00:00
Chris Lattner
00ffed0468 Add interfaces for targets to provide target-specific dag combiner optimizations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26442 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-01 04:52:55 +00:00
Evan Cheng
bf57e1f456 Missing a cast previously. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26434 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-01 00:58:54 +00:00
Chris Lattner
5ee3e14127 Add C_Memory operand type 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26344 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-24 01:10:14 +00:00
Chris Lattner
410354fe0c Make the LLVM headers "-ansi -pedantic -Wno-long-long" clean. 
Patch by Martin Partel!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26313 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-22 16:23:43 +00:00
Chris Lattner
1efa40f6a4 split register class handling from explicit physreg handling. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26308 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-22 00:56:39 +00:00
Chris Lattner
aba3b13fb3 Pass in a value type to getRegForInlineAsmConstraint, allowing targets to 
select different sets of registers depending on the type requested.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26304 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-21 23:10:29 +00:00
Nate Begeman
70804d3e14 Fix a nit sabre noticed 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26262 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-17 18:06:19 +00:00