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142 Commits

Author SHA1 Message Date
Chris Lattner
289a49ab7d ADd support for undef and unreachable 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17050 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-16 18:13:47 +00:00
Nate Begeman
e0c83a86b0 Better codegen of binary integer ops with 32 bit immediate operands. 
This transformation fires a few dozen times across the testsuite.

For example, int test2(int X) { return X ^ 0x0FF00FF0; }
Old:
_test2:
        lis r2, 4080
        ori r2, r2, 4080
        xor r3, r3, r2
        blr

New:
_test2:
        xoris r3, r3, 4080
        xori r3, r3, 4080
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17004 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-15 00:50:19 +00:00
Nate Begeman
bdf69847a9 Implement logical and with an immediate that consists of a contiguous block 
of one or more 1 bits (may wrap from least significant bit to most
significant bit) as the rlwinm rather than andi., andis., or some longer
instructons sequence.

int andn4(int z) { return z & -4; }
int clearhi(int z) { return z & 0x0000FFFF; }
int clearlo(int z) { return z & 0xFFFF0000; }
int clearmid(int z) { return z & 0x00FFFF00; }
int clearwrap(int z) { return z & 0xFF0000FF; }

_andn4:
        rlwinm r3, r3, 0, 0, 29
        blr

_clearhi:
        rlwinm r3, r3, 0, 16, 31
        blr

_clearlo:
        rlwinm r3, r3, 0, 0, 15
        blr

_clearmid:
        rlwinm r3, r3, 0, 8, 23
        blr

_clearwrap:
        rlwinm r3, r3, 0, 24, 7
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16832 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-08 02:49:24 +00:00
Nate Begeman
b816f0298d Several fixes and enhancements to the PPC32 backend. 
1. Fix an illegal argument to getClassB when deciding whether or not to
   sign extend a byte load.

2. Initial addition of isLoad and isStore flags to the instruction .td file
   for eventual use in a scheduler.

3. Rewrite of how constants are handled in emitSimpleBinaryOperation so
   that we can emit the PowerPC shifted immediate instructions far more
   often.  This allows us to emit the following code:

int foo(int x) { return x | 0x00F0000; }

_foo:
.LBB_foo_0:     ; entry
        ; IMPLICIT_DEF
        oris r3, r3, 15
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16826 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-07 22:30:03 +00:00
Chris Lattner
7c348e1c9f Correct some typeos 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16770 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-06 16:28:24 +00:00
Nate Begeman
35b020df39 Turning on fsel code gen now that we can do so would be good. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16765 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-06 11:03:30 +00:00
Nate Begeman
087d5d92f1 Implement floating point select for lt, gt, le, ge using the powerpc fsel 
instruction.

Now, rather than emitting the following loop out of bisect:
.LBB_main_19:	; no_exit.0.i
	rlwinm r3, r2, 3, 0, 28
	lfdx f1, r3, r27
	addis r3, r30, ha16(.CPI_main_1-"L00000$pb")
	lfd f2, lo16(.CPI_main_1-"L00000$pb")(r3)
	fsub f2, f2, f1
	addis r3, r30, ha16(.CPI_main_1-"L00000$pb")
	lfd f4, lo16(.CPI_main_1-"L00000$pb")(r3)
	fcmpu cr0, f1, f4
	bge .LBB_main_64	; no_exit.0.i
.LBB_main_63:	; no_exit.0.i
	b .LBB_main_65	; no_exit.0.i
.LBB_main_64:	; no_exit.0.i
	fmr f2, f1
.LBB_main_65:	; no_exit.0.i
	addi r3, r2, 1
	rlwinm r3, r3, 3, 0, 28
	lfdx f1, r3, r27
	addis r3, r30, ha16(.CPI_main_1-"L00000$pb")
	lfd f4, lo16(.CPI_main_1-"L00000$pb")(r3)
	fsub f4, f4, f1
	addis r3, r30, ha16(.CPI_main_1-"L00000$pb")
	lfd f5, lo16(.CPI_main_1-"L00000$pb")(r3)
	fcmpu cr0, f1, f5
	bge .LBB_main_67	; no_exit.0.i
.LBB_main_66:	; no_exit.0.i
	b .LBB_main_68	; no_exit.0.i
.LBB_main_67:	; no_exit.0.i
	fmr f4, f1
.LBB_main_68:	; no_exit.0.i
	fadd f1, f2, f4
	addis r3, r30, ha16(.CPI_main_2-"L00000$pb")
	lfd f2, lo16(.CPI_main_2-"L00000$pb")(r3)
	fmul f1, f1, f2
	rlwinm r3, r2, 3, 0, 28
	lfdx f2, r3, r28
	fadd f4, f2, f1
	fcmpu cr0, f4, f0
	bgt .LBB_main_70	; no_exit.0.i
.LBB_main_69:	; no_exit.0.i
	b .LBB_main_71	; no_exit.0.i
.LBB_main_70:	; no_exit.0.i
	fmr f0, f4
.LBB_main_71:	; no_exit.0.i
	fsub f1, f2, f1
	addi r2, r2, -1
	fcmpu cr0, f1, f3
	blt .LBB_main_73	; no_exit.0.i
.LBB_main_72:	; no_exit.0.i
	b .LBB_main_74	; no_exit.0.i
.LBB_main_73:	; no_exit.0.i
	fmr f3, f1
.LBB_main_74:	; no_exit.0.i
	cmpwi cr0, r2, -1
	fmr f16, f0
	fmr f17, f3
	bgt .LBB_main_19	; no_exit.0.i

We emit this instead:
.LBB_main_19:	; no_exit.0.i
	rlwinm r3, r2, 3, 0, 28
	lfdx f1, r3, r27
	addis r3, r30, ha16(.CPI_main_1-"L00000$pb")
	lfd f2, lo16(.CPI_main_1-"L00000$pb")(r3)
	fsub f2, f2, f1
	fsel f1, f1, f1, f2
	addi r3, r2, 1
	rlwinm r3, r3, 3, 0, 28
	lfdx f2, r3, r27
	addis r3, r30, ha16(.CPI_main_1-"L00000$pb")
	lfd f4, lo16(.CPI_main_1-"L00000$pb")(r3)
	fsub f4, f4, f2
	fsel f2, f2, f2, f4
	fadd f1, f1, f2
	addis r3, r30, ha16(.CPI_main_2-"L00000$pb")
	lfd f2, lo16(.CPI_main_2-"L00000$pb")(r3)
	fmul f1, f1, f2
	rlwinm r3, r2, 3, 0, 28
	lfdx f2, r3, r28
	fadd f4, f2, f1
	fsub f5, f0, f4
	fsel f0, f5, f0, f4
	fsub f1, f2, f1
	addi r2, r2, -1
	fsub f2, f1, f3
	fsel f3, f2, f3, f1
	cmpwi cr0, r2, -1
	fmr f16, f0
	fmr f17, f3
	bgt .LBB_main_19	; no_exit.0.i


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16764 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-06 09:53:04 +00:00
Nate Begeman
1f49e868aa Generate better code by being far less clever when it comes to the select instruction. Don't create overlapping register lifetimes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16580 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-29 05:00:31 +00:00
Nate Begeman
1b99fd3e8a improve Type::BoolTy codegen by eliminating unnecessary clears and sign extends 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16578 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-29 03:45:33 +00:00
Nate Begeman
a41fc77ae4 To go along with sabre's improved InstCombining, improve recognition of 
integers that we can use as immediate values in instructions.

Example from yacr2:
-       lis r10, -1
-       ori r10, r10, 65535
-       add r28, r28, r10
+       addi r28, r28, -1
        addi r7, r7, 1
        addi r9, r9, 1
        b .LBB_main_9   ; loopentry.1.i214


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16566 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-29 02:35:05 +00:00
Nate Begeman
da721e74f8 Correct some BuildMI arguments for the upcoming simple scheduler 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16519 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-27 05:08:17 +00:00
Nate Begeman
645495d2e6 Fix the last of the major PPC GEP folding deficiencies. This will allow 
the ISel to use indexed and non-zero immediate offsets for GEPs that have
more than one use.  This is common for instruction sequences such as a load
followed by a modify and store to the same address.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16493 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-23 05:31:33 +00:00
Nate Begeman
a2de102a5b add optimized code sequences for setcc x, 0 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16478 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-22 04:40:25 +00:00
Misha Brukman
a1dca55a3a s/ISel/PPC32ISel/ to have unique class names for debugging via gdb because the 
C++ front-end in gcc does not mangle classes in anonymous namespaces correctly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16470 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-21 18:22:19 +00:00
Nate Begeman
ed42853be1 All PPC instructions are now auto-printed 
32 and 64 bit AsmWriters unified
Darwin and AIX specific features of AsmWriter split out


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16163 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-04 05:00:00 +00:00
Nate Begeman
b7a8f2cdaa Convert remaining X-Form and Pseudo instructions over to asm writer 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16142 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-02 08:13:00 +00:00
Reid Spencer
551ccae044 Changes For Bug 352 
Move include/Config and include/Support into include/llvm/Config,
include/llvm/ADT and include/llvm/Support. From here on out, all LLVM
public header files must be under include/llvm/.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16137 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-01 22:55:40 +00:00
Nate Begeman
f2f0781a10 Implement the following missing functionality in the PPC backend: 
cast fp->bool
cast ulong->fp
algebraic right shift long by non-constant value
These changes tested across most of the test suite.  Fixes Regression/casts


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16081 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-29 08:19:32 +00:00
Nate Begeman
0e5e5f56bd Kill a majority of unnecessary sign extensions for byte loads 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15991 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-22 08:10:15 +00:00
Nate Begeman
a96c4af7f1 Back out branchless SetCC code. While it helped a lot in some cases, it 
hurt a lot in others.  Instead, improve branching version of SetCC and
Select instructions.  The old code will be in CVS should we ever need to
dig it up again.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15979 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-21 20:42:14 +00:00
Nate Begeman
b47321ba2b Implement code to convert SetCC into straight line code where appropriate. Add necessary instructions for this transformation to the .td file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15952 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-20 09:56:22 +00:00
Misha Brukman
d2cbb871d0 This PHI has 4 additional operands, not 2. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15926 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-19 21:00:12 +00:00
Nate Begeman
1e67d4d7ba Convert casts that will have no effect into move instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15914 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-19 08:07:50 +00:00
Nate Begeman
81d265d692 Clean up floating point instruction selection. 
Change int->float cast code to put conversion constants in constant pool.
Shorten code sequence for constant pool fp loads.
Remove LOADLoDirect/LOADLoIndirect psuedo instructions and tweak asmwriter


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15913 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-19 05:20:54 +00:00
Nate Begeman
07a73755d3 Re-fix hiding the Frame Pointer from the register allocator in functions 
that have a frame pointer.  This change fixes Burg.  In addition, make
the necessary changes to floating point code gen and constant loading after
Chris Lattner's fixes to the asm writer.  These changes fix MallocBench/gs


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15873 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-17 07:17:44 +00:00
Misha Brukman
f2ccb77ee9 PowerPC 32-/64-bit split: Part I, PPC32* bit files, adapted from former PowerPC* 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15850 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-17 04:55:41 +00:00
Nate Begeman
865075ed35 Fix mismatched adjust down/up of SP in functions that contain variable 
sized allocas.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15806 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-16 01:50:22 +00:00
Nate Begeman
43d64eae53 Fix float to int codepath by always allocating 8 bytes for the target of a double store; optimize cmplwi generation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15759 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-15 06:42:28 +00:00
Nate Begeman
6d1e2dfd86 Fix handling of FP constants with single precision, and loading of internal linkage function addresses 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15742 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-14 22:11:38 +00:00
Nate Begeman
b73a711ed7 Fix siod by switching BoolTy to byte rather than int until CFE changes for 
Darwin.  Also, change asm printer to output proper stubs for external
functions whose address is passed as an argument to aid in bugpointing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15721 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-13 09:32:01 +00:00
Nate Begeman
293d88ca8b Fix 177.mesa compilation, don't use floating point regs for base addresses! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15720 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-13 04:45:14 +00:00
Nate Begeman
8cfa427d9c Fix llc crasher compiling siod by giving BuildMI the correct number of arguments 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15719 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-13 03:56:49 +00:00
Nate Begeman
7a4fe9be7e Clean up 32/64bit and Darwin/AIX split. Next steps: 64 bit ISel, AIX asm printer. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15662 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-11 07:40:04 +00:00
Chris Lattner
74a806cd3d Fix a case where constantexprs could leak into the PPC isel. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15661 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-11 07:34:50 +00:00
Nate Begeman
8d963e602b Fix 255.vortex by using getClassB instead of getClass 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15648 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-11 03:30:55 +00:00
Misha Brukman
3d9a6c2842 Breaking up the PowerPC target into 32- and 64-bit subparts, Part I: 32-bit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15634 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-11 00:09:42 +00:00
Misha Brukman
5b5708106e Renamed PPC32 (namespace for regs, opcodes) to PPC to include 64-bit targets 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15631 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-10 22:47:03 +00:00
Nate Begeman
b64af918cb Fix casts of float to unsigned long 
Replace STDX (store 64 bit int indexed) with STFDX (store double indexed)
Fix latent bug in indexed load generation
Generate indexed loads and stores in many more cases


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15626 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-10 20:42:36 +00:00
Chris Lattner
3ea934668b Changes commited for Nate Begeman: 
Use a PowerPC specific prolog epilog inserter to control where spilled
callee save regs are placed on the stack.
Get rid of implicit return address stack slot, save return address reg
(LR) in appropriate slot
Improve code generated for functions that don't have calls or access
globals


Note from Chris: PowerPCPEI will eventually be eliminated, once the
functionality is merged into CodeGen/PrologEpilogInserter.cpp


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15536 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-06 06:58:50 +00:00
Misha Brukman
a0af38c46a Simplify loading (un)signed constants to registers, patch by Nate Begeman. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15306 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-07-28 19:13:49 +00:00
Misha Brukman
8b29776d68 LI can only take signed values, so values > 32767 can only be loaded with ORI 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15299 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-07-28 00:56:04 +00:00
Misha Brukman
fa20a6dfd7 Build COND_BRANCHes which may become long or short, decided by a later pass. 
Patch by Nate Begeman.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15282 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-07-27 18:35:23 +00:00
Misha Brukman
435c785803 Add IMPLICIT_DEF of LR for branch-and-link instrs (calls and global accesses) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15270 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-07-27 17:13:58 +00:00
Misha Brukman
b097f216b0 * Rewrote casts 
* Implemented GEP folding
* Dynamically output global address stuff once per function
* Fix casting fp<->short/byte

Patch contributed by Nate Begeman.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15237 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-07-26 18:13:24 +00:00
Misha Brukman
4722544855 Eliminate spurious empty space; make code easier to page through. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15146 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-07-23 22:35:49 +00:00
Misha Brukman
b160d1f9f7 Implement casting a floating point to 32-bit unsigned value 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15143 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-07-23 20:32:59 +00:00
Misha Brukman
e2eceb5c73 * Codegen of GEPs dramatically improved by folding multiplies and adds 
* Function pointers implemented correctly using appropriate stubs

Contributed by Nate Begeman.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15133 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-07-23 16:08:20 +00:00
Misha Brukman
4c14f33844 * Change class of BoolTy back to cInt 
* Fix indentation back to 2 spaces


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15121 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-07-23 01:11:19 +00:00
Misha Brukman
2ed17cadb4 * Change bool from cInt to cByte (for now) 
* Don't allow negative immediates to users of unsigned immediates
* Fix long compares
* Support <const int>, op as a potential immediate candidate
* Fix sign extension of short and byte loads
* Fix and improve integer casts
* Fix passing of doubles as vararg functions

Patch contributed by Nate Begeman.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15109 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-07-22 15:58:04 +00:00
Misha Brukman
a31f1f7cb2 * Add the lost fix to define the second reg of a 2-reg representation of longs 
* Fix opcode RLWNM -> RLWINM since it uses an immediate const shift value


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15087 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-07-21 20:30:18 +00:00