32754 Commits

Author SHA1 Message Date
Dan Gohman
769b7f8953 Add a const qualifier.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83677 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-09 22:09:05 +00:00
Dale Johannesen
bdb984bc27 Use names instead of numbers for some of the magic
constants used in inlining heuristics (especially
those used in more than one file).  No functional change.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83675 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-09 21:42:02 +00:00
Kevin Enderby
d7894f105a Added another bit of the ARM target assembler to llvm-mc to parse register
lists.  Changed ARMAsmParser::MatchRegisterName to return -1 instead of 0 on
errors so 0-15 values could be returned as register numbers.  Also added the
rest of the arm register names to the currently hacked up version to allow more
testing.  Some changes to ARMAsmParser::ParseOperand to give different errors
for things not yet supported and some additions to the hacked
ARMAsmParser::MatchInstruction to allow more testing for now.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83673 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-09 21:12:28 +00:00
Dan Gohman
599a87aca0 isTriviallyReMaterializable checks the
TargetInstrDesc::isRematerializable flag, so it isn't necessary to do
this check in its callers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83671 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-09 21:02:10 +00:00
Dan Gohman
11596ed43c Fix the x86 test-shrink optimization so that it doesn't shrink comparisons
when one of the bits being tested would end up being the sign bit in the
narrower type, and a signed comparison is being performed, since this would
change the result of the signed comparison. This fixes PR5132.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83670 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-09 20:35:19 +00:00
Dan Gohman
91e69c3715 Add basic infrastructure and x86 support for preserving MachineMemOperand
information when unfolding memory references.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83656 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-09 18:10:05 +00:00
Devang Patel
c525472828 Check invalid debug info for enums. This may happen when underlyng enum is optimized away. Eventually DwarfChecker will clean this up during llvm verification stage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83655 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-09 17:51:49 +00:00
Jim Grosbach
71c8dc9b20 when previous scratch register is killed, flag the value as no longer tracking
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83653 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-09 17:33:33 +00:00
Dan Gohman
7a721956f8 Revert r83606 and add comments explaining why it isn't safe.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83649 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-09 16:35:06 +00:00
Evan Cheng
64efb555ce Give Dan and my recent changes, machine LICM is now code size neutral.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83624 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-09 06:31:25 +00:00
Evan Cheng
3dc326ba83 Fix a logic error that caused non-rematable loop invariants loads to be licm'ed out of loop.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83622 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-09 06:21:52 +00:00
Evan Cheng
35ca9203f2 Reset kill markers after live interval is reconstructed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83608 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-09 01:17:11 +00:00
Dan Gohman
4db3581a28 Preserve HasNSW and HasNUW when constructing SCEVs for Add and Mul
instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83606 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-09 00:41:22 +00:00
Dale Johannesen
e91b9a3b59 When considering whether to inline Callee into Caller,
and that will make Caller too big to inline, see if it
might be better to inline Caller into its callers instead.
This situation is described in PR 2973, although I haven't
tried the specific case in SPASS.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83602 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-09 00:11:32 +00:00
Dan Gohman
3645b01002 Add the ability to track HasNSW and HasNUW on more kinds of SCEV expressions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83601 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-09 00:10:36 +00:00
Bob Wilson
5631139a69 Add codegen support for NEON vst4lane intrinsics with 128-bit vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83600 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-09 00:01:36 +00:00
Bob Wilson
8cdb269686 Add codegen support for NEON vst3lane intrinsics with 128-bit vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83598 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-08 23:51:31 +00:00
Bob Wilson
c5c6edb74f Add codegen support for NEON vst2lane intrinsics with 128-bit vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83596 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-08 23:38:24 +00:00
Bob Wilson
62e053e5a1 Add codegen support for NEON vld4lane intrinsics with 128-bit vectors.
Also fix some copy-and-paste errors in previous changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83590 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-08 22:53:57 +00:00
Evan Cheng
9c8068078b Remove code that makes no sense.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83589 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-08 22:42:35 +00:00
Bob Wilson
0bf7d998b4 Add codegen support for NEON vld3lane intrinsics with 128-bit vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83585 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-08 22:27:33 +00:00
Douglas Gregor
c6f520be0d Update CMake build yet again after a source file was removed
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83575 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-08 21:24:34 +00:00
Bill Wendling
26c6cf4cec It's possible for a global variable to be optimized out of a metadata object. So
we should allow a "null" with this dyn_cast.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83573 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-08 20:52:51 +00:00
Anton Korobeynikov
632606c724 Use lower16 / upper16 imm modifiers to asmprint 32-bit imms splitted via movt/movw pair.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83572 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-08 20:43:22 +00:00
Devang Patel
85d29e2de3 Clear variable debug info map at the end of the function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83571 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-08 20:41:17 +00:00
Bob Wilson
30aea9d96e Add codegen support for NEON vld2lane intrinsics with 128-bit vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83568 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-08 18:56:10 +00:00
Bob Wilson
cd7e327cdf Clean up some unnecessary initializations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83566 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-08 18:52:56 +00:00
Bob Wilson
af4a891273 Clean up a comment (indentation was wrong).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83565 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-08 18:51:31 +00:00
Bob Wilson
5fcbf0d26e Add a SelectionDAG getTargetInsertSubreg convenience function,
similar to getTargetExtractSubreg.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83564 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-08 18:49:46 +00:00
Devang Patel
eda312193d Do not record line number to implicitly mark start of function if function has arguments. Extra line number entries trip gdb in some cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83563 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-08 18:48:03 +00:00
Richard Osborne
bfa19bf4c2 Add missing names for the XCore specific LADD and LSUB nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83556 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-08 17:14:57 +00:00
Dan Gohman
8a261e44f7 Add a form of addPreserved which takes a string argument, to allow passes
to declare that they preserve other passes without needing to pull in
additional header file or library dependencies. Convert MachineFunctionPass
and CodeGenLICM to make use of this.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83555 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-08 17:00:02 +00:00
Richard Osborne
c96c8e0e81 Add some peepholes for signed comparisons using ashr X, X, 32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83549 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-08 15:38:17 +00:00
Chris Lattner
8ef27511e3 remove LoopVR pass. According to Nick:
"LoopVR's logic was copied into ScalarEvolution::getUnsignedRange and 
::getSignedRange. Please delete LoopVR."



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83531 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-08 06:42:44 +00:00
Bob Wilson
deb3141cf5 Add codegen support for NEON vst4 intrinsics with <1 x i64> vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83526 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-08 05:18:18 +00:00
Jim Grosbach
1f30dcbd8d Cleanup up unused R3LiveIn tracking.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83522 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-08 01:50:26 +00:00
Jim Grosbach
65c58daa8b Re-enable register scavenging in Thumb1 by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83521 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-08 01:46:59 +00:00
Jim Grosbach
e40bf5f9f4 bugfix. The target may use virtual registers that aren't tracked for re-use but are allocated by the scavenger. The re-use algorithm needs to watch for that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83519 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-08 01:09:45 +00:00
Bob Wilson
5adf60c03b Add codegen support for NEON vst3 intrinsics with <1 x i64> vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83518 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-08 00:28:28 +00:00
Bob Wilson
24e04c535f Add codegen support for NEON vst2 intrinsics with <1 x i64> vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83513 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-08 00:21:01 +00:00
Jeffrey Yasskin
4306963170 In instcombine's debug output, avoid printing ADD for instructions that are
already on the worklist, and print Visited when an instruction is about to be
visited.  Net, on one input, this reduced the output size by at least 9x.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83510 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-08 00:12:24 +00:00
Bob Wilson
0ea38bb939 Add codegen support for NEON vld4 intrinsics with <1 x i64> vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83508 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-07 23:54:04 +00:00
Bob Wilson
c67160c010 Add codegen support for NEON vld3 intrinsics with <1 x i64> vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83506 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-07 23:39:57 +00:00
Bob Wilson
a4288080e6 Add codegen support for NEON vld2 intrinsics with <1 x i64> vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83502 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-07 22:57:01 +00:00
Jim Grosbach
9f3a559dff reverting thumb1 scavenging default due to test failure while I figure out what's up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83501 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-07 22:49:41 +00:00
Chris Lattner
831a2bba04 second half of lazy liveness removal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83500 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-07 22:49:30 +00:00
Dale Johannesen
5f3663e51d Fix handling of x86 'R' constraint.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83499 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-07 22:47:20 +00:00
Jim Grosbach
bafa3d9f6a Enable thumb1 register scavenging by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83496 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-07 22:26:31 +00:00
Jim Grosbach
ec1434dd89 Enable thumb1 register scavenging by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83494 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-07 22:26:14 +00:00
Devang Patel
beab41b874 Extract subprogram and compile unit information from the debug info attached to an instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83491 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-07 22:04:08 +00:00