Vikram S. Adve
6a0c6d82a9
Use extra operand for instructions that set a CC register that
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was not explicit before.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@347 91177308-0d34-0410-b5e6-96231b3b80d8
2001-08-06 21:05:39 +00:00
Vikram S. Adve
0a229ed79a
Added dummy Phi instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335 91177308-0d34-0410-b5e6-96231b3b80d8
2001-07-31 21:48:23 +00:00
Vikram S. Adve
670d0abe49
Added several SPARC instructions including conditional move and SETHI.
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Added MachineInstrInfo class and subclass UltraSparcInstrInfo.
Added several fields to MachineInstrDescriptor (and renamed it from
MachineInstrInfo). Latency fields are to support scheduling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313 91177308-0d34-0410-b5e6-96231b3b80d8
2001-07-28 04:26:42 +00:00
Chris Lattner
68498cefe6
Eliminate lots of unnecessary #includes and forward decls
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there are probably more to kill
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261 91177308-0d34-0410-b5e6-96231b3b80d8
2001-07-21 23:24:48 +00:00
Chris Lattner
7e583cfafe
Renamed include/llvm/Codegen to include/llvm/CodeGen
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253 91177308-0d34-0410-b5e6-96231b3b80d8
2001-07-21 20:58:30 +00:00
Vikram S. Adve
23ee550765
Header files for the target architecture description and for instruction
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selection, and instances of these for the SPARC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226 91177308-0d34-0410-b5e6-96231b3b80d8
2001-07-21 12:39:03 +00:00
