14127 Commits

Author SHA1 Message Date
Dan Gohman
b116142d3b Revert r129875, XFAILing this test for arm, since the fix was reverted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139058 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-03 00:14:24 +00:00
Jakob Stoklund Olesen
5047d76575 Pseudo CMOV instructions don't clobber EFLAGS.
The explanation about a 0 argument being materialized as xor is no
longer valid.  Rematerialization will check if EFLAGS is live before
clobbering it.

The code produced by X86TargetLowering::EmitLoweredSelect does not
clobber EFLAGS.

This causes one less testb instruction to be generated in the cmov.ll
test case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139057 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 23:52:55 +00:00
Jim Grosbach
83452b2064 Thumb2 parsing and encoding for CBZ/CBNZ.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139054 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 23:46:10 +00:00
Jim Grosbach
6c3e11ea55 Thumb2 parsing and encoding for BXJ.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139053 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 23:43:09 +00:00
Jim Grosbach
cefd2020a6 Thumb2 parsing and encoding for BIC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139052 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 23:37:54 +00:00
Jim Grosbach
0b9a3d37c5 Thumb2 parsing and encoding for BFI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139051 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 23:28:46 +00:00
Jim Grosbach
7413f41d3b Thumb2 parsing and encoding for BFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139050 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 23:25:46 +00:00
Jim Grosbach
a110988b39 Thumb2 parsing and encoding of B instruction.
Tweak handling of IT blocks a bit to enable this. The differentiation between
B and Bcc needs special sauce.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139049 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 23:22:08 +00:00
Bill Wendling
47e208bbea Try to eliminate the use of the 'unwind' instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139046 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 22:41:11 +00:00
Eli Friedman
4136d23c48 Don't fast-isel for atomic load/store; some cases require extra handling missing from fast-isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139044 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 22:33:24 +00:00
Jim Grosbach
5f25fb01b4 Thumb2 parsing and encoding for ASR.
For other shift and rotate instructions, too. Tests for those forthcoming
as I work my way through the ISA.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139040 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 21:28:54 +00:00
Bill Wendling
d5941195e2 Better fix for this testcase. Update it to the new EH scheme entirely.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139039 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 21:27:08 +00:00
Bill Wendling
cc6927b9e1 Update for new EH stuff. (I'm not sure if this is 100% correct.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139038 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 21:24:17 +00:00
Andrew Trick
6984625d16 Test case update for unroll-scev.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139037 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 21:21:03 +00:00
Kevin Enderby
d5705fe50d Change X86 disassembly to print immediates values as signed by default. Special
case those instructions that the immediate is not sign-extend.  radr://8795217


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139028 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 20:01:23 +00:00
Jim Grosbach
5c1ac55542 Thumb2 parsing and encoding for AND (register).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139021 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 18:41:35 +00:00
Jim Grosbach
f0851e5d95 Thumb2 parsing and encoding for ADD (register).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139017 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 18:14:46 +00:00
Duncan Sands
147272b8a7 Darwin wants ctors/dtors to be ordered the other way round to linux.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139015 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 18:07:19 +00:00
Kevin Enderby
98f213cd60 Fix the disassembly of the X86 "crc32w %ax, %eax" instruction. Bug 10702.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139014 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 18:03:03 +00:00
Jim Grosbach
ca52a7e38c Tests for Thumb2 AND (immediate) instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139013 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 17:44:27 +00:00
Jakub Staszak
9469d5cf48 Extra CHECK-NOT to make sure that GVN transform works properly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139012 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 17:40:39 +00:00
Andrew Trick
dc07321164 -unroll-scev flag removal
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139010 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 17:36:14 +00:00
Jim Grosbach
aca878c5e6 Add FIXME. Thumb2 ADR encoding choice is non-trivial.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139008 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 17:21:59 +00:00
Jakub Staszak
4c6b8bee2a ConstantVector returns arbitrary value for the wrong index.
This fixes PR10813.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139006 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 15:43:43 +00:00
Jakub Staszak
8cec759339 Compare type size instead of type _store_ size to make sure that BitCastInst
will be valid. This fixes PR10820.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139005 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 14:57:37 +00:00
Kalle Raiskila
989621f1f8 Pass signed (not unsigned) 10 bit field to SPU 'ori' instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139004 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 10:05:01 +00:00
Craig Topper
5ffedb9352 Make IC_VEX* not inherit from IC_*. Prevents instructions with no VEX form from disassembling to their non-VEX form. Also prevents weak filter collisons that were keeping valid VEX instructions from decoding properly. Make VEX_L* not inherit from VEX_* because the VEX.L bit always important. This stops packed int VEX encodings from being disassembled when specified with VEX.L=1. Fixes PR10831 and PR10806.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138997 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 04:17:54 +00:00
Bill Wendling
b0b9a67f98 Update to new EH scheme.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138989 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 01:25:11 +00:00
Dan Gohman
6b13cd4154 Revert r131152, r129796, r129761. This code is currently considered
to be unreliable on platforms which require memcpy calls, and it is
complicating broader legalize cleanups. It is hoped that these cleanups
will make memcpy byval easier to implement in the future.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138977 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 23:07:08 +00:00
Benjamin Kramer
36a16015ac Don't drop alignment info on local common symbols.
- On COFF the .lcomm directive has an alignment argument.
- On ELF we fall back to .local + .comm

Based on a patch by NAKAMURA Takumi.

Fixes PR9337, PR9483 and PR10128.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138976 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 23:04:27 +00:00
Eli Friedman
770e16fe17 Fix test; sorry for any inconvenience.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138966 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 21:25:42 +00:00
Eli Friedman
86b5db8c01 Fix an issue with the IR sink pass found by inspection. (I'm not sure anyone is actually using this, but might as well fix it since I found the issue.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138965 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 21:21:24 +00:00
Eli Friedman
89e0f4b5b0 Add missing newline.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138964 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 21:20:11 +00:00
Benjamin Kramer
bcf47a5bce XFAIL this test on arm until the backend is fixed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138955 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 18:40:03 +00:00
Benjamin Kramer
d4f27d7daa This test depends on cmov being available.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138954 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 18:40:01 +00:00
Jakob Stoklund Olesen
4a0a18af4a Permit remat of partial register defs when it is safe.
An instruction may define part of a register where the other bits are
undefined. In that case, it is safe to rematerialize the instruction.
For example:

  %vreg2:ssub_0<def> = VLDRS <cp#0>, 0, pred:14, pred:%noreg, %vreg2<imp-def>

The extra <imp-def> operand indicates that the instruction does not read
the other parts of the virtual register, so a remat is safe.

This patch simply allows multiple def operands for the virtual register.
It is MI->readsVirtualRegister() that determines if we depend on a
previous value so remat is impossible.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138953 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 18:27:51 +00:00
Jim Grosbach
2f25d9b933 ARM 'rscs' mnemonic is carry-setting 'rsc', not 'rs' with a 'cs' condition code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138952 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 18:22:13 +00:00
Bruno Cardoso Lopes
a39ccdb9d4 Fix vbroadcast matching logic to early unmatch if the node doesn't have
only one use. Fix PR10825.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138951 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 18:15:06 +00:00
Owen Anderson
7f17b5a483 t2Bcc is allowed to have a predicate without a preceding IT instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138946 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 17:47:45 +00:00
Jakob Stoklund Olesen
9d548d0343 Prevent remat of partial register redefinitions.
An instruction that redefines only part of a larger register can never
be rematerialized since the virtual register value depends on the old
value in other parts of the register.

This was fixed for the inline spiller in r138794.  This patch fixes the
problem for all register allocators, and includes a small test case.

<rdar://problem/10032939>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138944 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 17:18:50 +00:00
Bill Wendling
00c30d58a5 Update to new EH scheme.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138933 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 01:28:25 +00:00
Bill Wendling
65088e7d96 Update to new EH scheme.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138928 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 01:08:21 +00:00
Bill Wendling
15db556b56 Update to new EH scheme.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138927 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 01:02:41 +00:00
Bill Wendling
aeaa9a8b25 Update some tests to the new EH scheme.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138925 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 00:58:03 +00:00
Andrew Trick
340d78f4e7 PreRA scheduler should avoid cloning compares.
Added canClobberReachingPhysRegUse() to handle a particular pattern in
which a two-address instruction could be forced to interfere with
EFLAGS, causing a compare to be unnecessarilly cloned.
Fixes rdar://problem/5875261


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138924 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 00:54:31 +00:00
Jim Grosbach
20ed2e7939 Thumb2 assembly parsing and encoding for ADD(immediate).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138922 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 00:28:52 +00:00
Bill Wendling
b5d92d83b4 Reenable test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138916 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-31 23:08:05 +00:00
Bill Wendling
3b5e99d79e Revert accidental commit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138915 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-31 23:07:46 +00:00
Eli Friedman
1b73866505 Disable this test until Bill fixes it properly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138914 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-31 23:03:30 +00:00
Bill Wendling
08c2862540 Update to new EH scheme.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138908 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-31 21:50:07 +00:00