6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-01-03 13:31:05 +00:00
Code Issues Projects Releases Wiki Activity
57,154 Commits 39 Branches 0 Tags 277 MiB
8112b5322e
Commit Graph

36042 Commits

Author SHA1 Message Date
Evan Cheng
8112b5322e Emit an error for illegal inline asm constraint (which uses illegal type) rather than asserting. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95746 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-10 01:21:02 +00:00
Chris Lattner
3143e90ca8 fix missing #includes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95745 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-10 01:17:36 +00:00
Chris Lattner
a2bd92b130 daniel *really* likes fixups! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95742 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-10 01:05:28 +00:00
Bill Wendling
d3a47a3ef3 Improve comments a even more. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95740 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-10 00:59:47 +00:00
Dale Johannesen
bd63520161 Skip DBG_VALUE many places in live intervals and 
register coalescing.  This fixes many crashes and
places where debug info affects codegen (when
dbg.value is lowered to machine instructions, which
it isn't yet in TOT).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95739 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-10 00:55:42 +00:00
Chris Lattner
47529c9ac6 Move verbose asm instruction comments to using MCStreamer. 
The major win of this is that the code is simpler and they 
print on the same line as the instruction again:

        movl    %eax, 96(%esp)          ## 4-byte Spill
        movl    96(%esp), %eax          ## 4-byte Reload
        cmpl    92(%esp), %eax          ## 4-byte Folded Reload
        jl      LBB7_86



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95738 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-10 00:47:53 +00:00
Bill Wendling
35c187bcfd Improve comments a bit more. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95737 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-10 00:45:28 +00:00
Dale Johannesen
3b1906f48d more comment updates 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95736 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-10 00:44:23 +00:00
Dale Johannesen
9653f9ec97 Add isDebug argument to ChangeToRegister; this prevents 
the field from being used uninitialized later in some cases.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95735 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-10 00:41:49 +00:00
Chris Lattner
8e089a9e4d print all the newlines at the end of instructions with 
OutStreamer.AddBlankLine instead of textually.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95734 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-10 00:36:00 +00:00
Kenneth Uildriks
f1f505f85c IntegerValType holds a uint32_t, so its constructor should take a uint32_t. This allows it to be properly initialized with bit widths > 65535 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95731 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-10 00:14:03 +00:00
Dale Johannesen
10fedd21d3 Fix comments to reflect renaming elsewhere. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95730 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-10 00:11:11 +00:00
Kevin Enderby
40fe18f66e Fix the encoding of the movntdqa X86 instruction. It was missing the 0x66 
prefix which is part of the opcode encoding.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95729 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-10 00:10:31 +00:00
Chris Lattner
5d672cfab0 Add ability for MCInstPrinters to add comments for instructions. 
Enhance the x86 backend to show the hex values of immediates in
comments when they are large.  For example:

        movl    $1072693248, 4(%esp)    ## imm = 0x3FF00000



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95728 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-10 00:10:18 +00:00
David Greene
51898d7a89 TableGen fragment refactoring. 
Move some utility TableGen defs, classes, etc. into a common file so
they may be used my multiple pattern files.  We will use this for
the AVX specification to help with the transition from the current
SSE specification.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95727 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-09 23:52:19 +00:00
Johnny Chen
4814e711ab Add VBIF/VBIT for disassembly only. 
A8.6.279


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95713 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-09 23:05:23 +00:00
David Greene
39143700a4 Only dump output in debug mode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95711 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-09 23:03:05 +00:00
Daniel Dunbar
6b71653c82 llvm-mc: Add --show-fixups option, for displaying the instruction fixup information in the asm comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95710 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-09 23:00:14 +00:00
Daniel Dunbar
869fe12cc0 MC/X86: Add a dummy implementation of MCFixup generation for hacky X86 MCCodeEmitter. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95709 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-09 23:00:03 +00:00
Daniel Dunbar
73c557458c MC: First cut at MCFixup, for getting fixup/relocation information out of an MCCodeEmitter. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95708 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-09 22:59:55 +00:00
Bill Wendling
1f8075d7d2 Improve comments in the LSDA somewhat. They can be improved much more. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95707 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-09 22:49:16 +00:00
Johnny Chen
c9745049e6 Added VMRS/VMSR for disassembly only. 
A8.6.335 & A8.6.336


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95703 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-09 22:35:38 +00:00
Chris Lattner
a8168ec732 port encoder enhancements over to the new encoder. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95699 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-09 21:57:34 +00:00
Chris Lattner
9e8528fc5c fix X86 encoder to output [disp] only addresses with no SIB byte 
in X86-32 mode.  This is still required in x86-64 mode to avoid
forming [disp+rip] encoding.  Rewrite the SIB byte decision logic
to be actually understandable.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95693 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-09 21:47:19 +00:00
Eric Christopher
415326b4ed Move Intrinsic::objectsize lowering back to InstCombineCalls and 
enable constant 0 offset lowering.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95691 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-09 21:24:27 +00:00
Chris Lattner
32f9a2c54e revert r95689: getX86RegNum(BaseReg) != N86::ESP is 
a confusing idiom to check for ESP or RSP.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95690 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-09 21:21:26 +00:00
Chris Lattner
203efab2a5 simplify. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95689 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-09 21:00:12 +00:00
Chris Lattner
518bb53485 move target-independent opcodes out of TargetInstrInfo 
into TargetOpcodes.h.  #include the new TargetOpcodes.h
into MachineInstr.  Add new inline accessors (like isPHI())
to MachineInstr, and start using them throughout the 
codebase.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95687 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-09 19:54:29 +00:00
Jim Grosbach
4152778605 Radar 7417921 
tMOVCCi pattern only valid for low registers, as the Thumb1 mov immediate to
register instruction only works with low registers. Allowing high registers
for the instruction resulted in the assembler choosing the wide (32-bit)
encoding for the mov, but LLVM though the instruction was only 16 bits wide,
so offset calculations for constant pools became incorrect, leading to
out of range constant pool entries.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95686 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-09 19:51:37 +00:00
Eric Christopher
d2592ff69b Pull these back out, they're a little too aggressive and time 
consuming for a simple optimization.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95671 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-09 17:29:18 +00:00
Johnny Chen
2d658df873 Added vcvtb/vcvtt (between half-precision and single-precision, VFP). 
For disassembly only.

A8.6.300


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95669 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-09 17:21:56 +00:00
Jakob Stoklund Olesen
00350dbd71 Remember to update live-in lists when coalescing physregs. 
Patch by M Wahab!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95668 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-09 17:20:11 +00:00
Chris Lattner
97dce2a9aa move PR3462 to here. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95650 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-09 05:55:14 +00:00
Chris Lattner
1728472726 add a note from PR6194 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95649 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-09 05:45:29 +00:00
Dale Johannesen
d94998f525 Skip DEBUG_VALUE in some places where it was affecting codegen. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95647 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-09 02:01:46 +00:00
Devang Patel
8581e0147c Add declaration attribute to a variable DIE, if there is a separate DIE for the definition. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95646 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-09 01:58:33 +00:00
Chris Lattner
e576f292ee simplify this code, duh. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95643 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-09 01:14:06 +00:00
Chris Lattner
e538db4fb0 fix PR6193, only considering sign extensions *from i1* for this 
xform.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95642 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-09 01:12:41 +00:00
Eric Christopher
940ab54755 Add file in here too. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95641 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-09 01:11:03 +00:00
Chris Lattner
30d9a644d5 make -show-inst be formatted a bit nicer. Before: 
movl	$3735928559, a          ## inst: <MCInst 1273 <MCOperand Reg:0> <MCOperand Imm:1> <MCOperand Reg:0> <MCOperand Expr:(a)> <MCOperand Reg:0> <MCOperand Expr:(3735928559)>>

after:

	movl	$3735928559, a          ## <MCInst #1273
                                        ##   <MCOperand Reg:0>
                                        ##   <MCOperand Imm:1>
                                        ##   <MCOperand Reg:0>
                                        ##   <MCOperand Expr:(a)>
                                        ##   <MCOperand Reg:0>
                                        ##   <MCOperand Expr:(3735928559)>>





git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95637 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-09 00:54:51 +00:00
Lang Hames
0b23dc0cc8 Fixed a bug in the PBQP allocator's findCoalesces method. 
Previously spill registers, whose def indexes are not defined, would sometimes be improperly marked as coalescable with conflicting registers. The new findCoalesces routine conservatively assumes that any register with at least one undefined def is not coalescable with any register it interferes with.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95636 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-09 00:50:27 +00:00
Chris Lattner
e16b0fc3cb Implement x86 asm parsing support for %st and %st(4) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95634 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-09 00:49:22 +00:00
Lang Hames
ddea94a819 Added copy sensible construction & assignment to PBQP graphs and fixed a memory access bug in the heuristic solver. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95633 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-09 00:45:48 +00:00
Eric Christopher
1926b648e1 Add a new pass to do llvm.objsize lowering using SCEV. 
Initial skeleton and SCEVUnknown lowering implemented,
the rest should come relatively quickly.  Move testcase
to new directory.

Move pass to right before SimplifyLibCalls - which is
moved down a bit so we can take advantage of a few opts.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95628 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-09 00:35:38 +00:00
Chris Lattner
b8d6e98e56 pass stringref by value instead of by const& 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95627 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-09 00:34:28 +00:00
Chris Lattner
cf031f6d66 move PR6212 to this file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95624 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-09 00:11:10 +00:00
Dan Gohman
5938a3e681 Implement AsmPrinter support for several more operators which have 
direct MCExpr equivalents. Don't use MCExpr::Shr because it isn't
consistent between targets.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95620 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-09 00:02:37 +00:00
Dan Gohman
036c130e90 Document that MCExpr::Mod is actually remainder. 
Document that MCExpr::Div, Mod, and the comparison operators are all
signed operators.

Document that the comparison operators' results are target-dependent.

Document that the behavior of shr is target-dependent.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95619 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-08 23:58:47 +00:00
Chris Lattner
8609fda0f7 fix some problems handling large vectors reported in PR6230 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95616 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-08 23:56:03 +00:00
Chris Lattner
c133457269 this is done, tested by CodeGen/ARM/iabs.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95609 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-08 23:48:10 +00:00