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336 Commits

Author SHA1 Message Date
Benjamin Kramer
6c59c7a6fd R600: Make helper functions static. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183744 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-06-11 13:32:25 +00:00
Vincent Lejeune
843c6c2d0e R600: Use a refined heuristic to choose when switching clause 
This is using a hint from AMD APP OpenCL Programming Guide with
empirically tweaked parameters.
I used Unigine Heaven 3.0 to determine best parameters on my system
(i7 2600/Radeon 6950/Kernel 3.9.4) the benchmark :
it went from 38.8 average fps to 39.6, which is ~3% gain.
(Lightmark 2008.2 gain is much more marginal: from 537 to 539)

There is no lit test provided as the parameter were determined
empirically and it it would be nearly impossiblet to find a test
program that check for optimal behavior.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183593 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-06-07 23:30:34 +00:00
Vincent Lejeune
b01bdf87ff R600: Anti dep better handled in tex clause 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183592 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-06-07 23:30:26 +00:00
Tom Stellard
df74b86e1e R600: Fix calculation of stack offset in AMDGPUFrameLowering 
We weren't computing structure size correctly and we were relying on
the original alloca instruction to compute the offset, which isn't
always reliable.

Reviewed-by: Vincent Lejeune <vljn@ovi.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183568 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-06-07 20:52:05 +00:00
Tom Stellard
3ff0abfaab R600: Rework subtarget info and remove AMDILDevice classes 
This should simplify the subtarget definitions and make it easier to
add new ones.

Reviewed-by: Vincent Lejeune <vljn@ovi.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183566 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-06-07 20:37:48 +00:00
Bill Wendling
b5632b5b45 Don't cache the instruction and register info from the TargetMachine, because 
the internals of TargetMachine could change.

No functionality change intended.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183561 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-06-07 20:28:55 +00:00
Tom Stellard
ce961477be R600: Fix the fetch limits for R600 generation GPUs 
Reviewed-by: Vincent Lejeune <vljn@ovi.com>

https://bugs.freedesktop.org/show_bug.cgi?id=64257

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183560 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-06-07 20:28:55 +00:00
Tom Stellard
630547ada4 R600: Move Subtarget feature definitions into AMDGPU.td 
This is the convention used by the other targets.

Reviewed-by: Vincent Lejeune <vljn@ovi.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183559 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-06-07 20:28:49 +00:00
Tom Stellard
6f3b49323c R600: Remove unnecessary include 
Reviewed-by: Vincent Lejeune <vljn@ovi.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183558 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-06-07 20:28:43 +00:00
Benjamin Kramer
1983a4cbf1 R600: Don't compare iterators of different maps. 
Found be libstdc's debug mode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183549 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-06-07 19:59:34 +00:00
Benjamin Kramer
2e0cebd881 Vincent says the element is at most once in the vector, so we don't need a full std::remove. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183541 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-06-07 18:18:12 +00:00
Benjamin Kramer
47b0c0a9a0 R600: Fix a potential iterator invalidation issue. 
As a bonus this reduces the loop from O(n^2) to O(n).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183532 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-06-07 16:13:49 +00:00
Vincent Lejeune
74f03455e5 R600: Remove an extra break in R600OptimizeVectorRegisters.cpp 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183528 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-06-07 15:44:53 +00:00
Vincent Lejeune
81c5d11c25 R600: Rewrite an awkward loop in R600MachineScheduler 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183458 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-06-06 23:08:32 +00:00
Vincent Lejeune
5f035d048e R600: Remove leftover code in R600MachineScheduler.cpp 
Spotted by Benjamin Kramer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183413 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-06-06 14:18:29 +00:00
Bill Wendling
2ed7659b88 Cast to the correct type. Pointer, not reference. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183385 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-06-06 05:39:29 +00:00
NAKAMURA Takumi
0ac857462f R600OptimizeVectorRegisters.cpp: Tweak a warning. [-Wsometimes-uninitialized] 
FIXME: Is it false alarm?

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183371 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-06-06 02:15:12 +00:00
NAKAMURA Takumi
7b6d32a361 R600OptimizeVectorRegisters.cpp: Suppress a warning. [-Wunused-variable] 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183370 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-06-06 02:15:06 +00:00
NAKAMURA Takumi
3ebcf388cd Trailing linefeed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183369 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-06-06 02:15:00 +00:00
Bill Wendling
b88cef5a16 Cast to the proper type. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183365 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-06-06 01:04:21 +00:00
Tom Stellard
c170230b3a R600: Replace predicate loop with predicate function 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183351 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-06-05 23:39:50 +00:00
Vincent Lejeune
f3d6e32c09 R600: Add a pass that merge Vector Register 
Previously commited @183279 but tests were failing, reverted @183286
It was broken because @183336 was missing, now it's there.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183343 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-06-05 21:38:04 +00:00
Vincent Lejeune
512119770e R600: Schedule copy from phys register at beginning of block 
It allows regalloc pass to remove them by trivially assigning associated reg

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183336 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-06-05 20:27:35 +00:00
Tom Stellard
ad7ecc65b1 R600: Make sure to schedule AR register uses and defs in the same clause 
Reviewed-by: vljn at ovi.com

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183294 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-06-05 03:43:06 +00:00
Rafael Espindola
6afb65c2b7 Revert "R600: Add a pass that merge Vector Register" 
This reverts commit r183279. CodeGen/R600/texture-input-merge.ll was failing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183286 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-06-05 01:48:30 +00:00
Vincent Lejeune
bbbdba891b R600: Add a pass that merge Vector Register 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183279 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-06-04 23:17:26 +00:00
Vincent Lejeune
e67a4afb5d R600: Const/Neg/Abs can be folded to dot4 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183278 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-06-04 23:17:15 +00:00
Vincent Lejeune
98017a015b R600: Swizzle texture/export instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183229 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-06-04 15:04:53 +00:00
Aaron Ballman
f3d3952a8c Silencing an MSVC warning about mixing bool and unsigned int. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183176 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-06-04 01:03:03 +00:00
Tom Stellard
e5fcc0dee4 R600/SI: Add support for work item and work group intrinsics 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183138 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-06-03 17:40:18 +00:00
Tom Stellard
e7397ee81a R600/SI: Add a calling convention for compute shaders 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183137 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-06-03 17:40:11 +00:00
Tom Stellard
e86f9d70ca R600/SI: Custom lower i64 sign_extend 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183136 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-06-03 17:40:03 +00:00
Tom Stellard
17e8ad67f0 R600/SI: Adjust some instructions' out register class after ISel 
This is necessary to avoid generating VGPR to SGPR copies in some
cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183135 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-06-03 17:39:58 +00:00
Tom Stellard
b89a467559 R600/SI: Handle REG_SEQUENCE in fitsRegClass() 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183134 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-06-03 17:39:54 +00:00
Tom Stellard
051a28e0e8 R600/SI: Handle nodes with glue results correctly SITargetLowering::foldOperands() 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183133 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-06-03 17:39:50 +00:00
Tom Stellard
8a72c73032 R600/SI: Fixup CopyToReg register class in PostprocessISelDAG() 
The CopyToReg nodes will sometimes try to copy a value from a VGPR to an
SGPR.  This kind of copy is not possible, so we need to detect
VGPR->SGPR copies and do something else.  The current strategy is to
replace these copies with VGPR->VGPR copies and hope that all the users
of CopyToReg can accept VGPRs as arguments.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183132 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-06-03 17:39:46 +00:00
Tom Stellard
132183510f R600/SI: Add support for global loads 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183131 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-06-03 17:39:43 +00:00
Tom Stellard
4956bc61e1 R600/SI: Rework MUBUF store instructions 
The lowering of stores is now mostly handled in the tablegen files.  No
more BUFFER_STORE nodes I generated during legalization.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183130 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-06-03 17:39:37 +00:00
Vincent Lejeune
0c92287985 R600: 3 op instructions have no write bit but the result are store in PV 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183111 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-06-03 15:56:12 +00:00
Vincent Lejeune
fdf7ab1c69 R600: CALL_FS consumes a stack size entry 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183108 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-06-03 15:44:42 +00:00
Vincent Lejeune
96fe0be43b R600: use capital letter for PV channel 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183107 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-06-03 15:44:35 +00:00
Vincent Lejeune
0962e147a4 R600: Constraints input regs of interp_xy,_zw 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183106 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-06-03 15:44:16 +00:00
Ahmed Bougacha
23ed37a6b7 Make SubRegIndex size mandatory, following r183020. 
This also makes TableGen able to compute sizes/offsets of synthesized
indices representing tuples.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183061 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-05-31 23:45:26 +00:00
Patrik Hagglund
92b4f20346 Temporary fix to get rid of gcc warning. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182832 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-05-29 07:32:08 +00:00
Andrew Trick
ac6d9bec67 Track IR ordering of SelectionDAG nodes 2/4. 
Change SelectionDAG::getXXXNode() interfaces as well as call sites of
these functions to pass in SDLoc instead of DebugLoc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182703 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-05-25 02:42:55 +00:00
Tom Stellard
d078070f6a R600: Fix R600ControlFlowFinalizer not considering VTX_READ 128 bit dst reg 
Patch by: Vincent Lejeune

https://bugs.freedesktop.org/show_bug.cgi?id=64877

NOTE: This is a candidate for the 3.3 branch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182600 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-05-23 18:26:42 +00:00
Benjamin Kramer
5c35290fa3 Move passes from namespace llvm into anonymous namespaces. Sort includes while there. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182594 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-05-23 17:10:37 +00:00
Benjamin Kramer
879b071bf5 R600: Hide symbols of implementation details. 
Also removes an unused function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182587 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-05-23 15:43:05 +00:00
Aaron Ballman
061ff3409d Setting the default value (fixes CRT assertions about uninitialized variable use when doing debug MSVC builds), and fixing coding style. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182585 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-05-23 14:55:00 +00:00
Rafael Espindola
7eac032203 Fix 32 bit build in c++11 mode. 
The error was:
error: non-constant-expression cannot be narrowed from type 'long long' to 'long' in initializer list [-Wc++11-narrowing]
        MI.getOperand(6).getImm() & 0x1F,

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182584 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-05-23 13:22:30 +00:00