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168 Commits

Author SHA1 Message Date
Chris Lattner
550b1e59c4 When legalizing brcond ->brcc or select -> selectcc, make sure to truncate 
the old condition to a one bit value.  The incoming value must have been
promoted, and the top bits are undefined.  This causes us to generate:

_test:
        rlwinm r2, r3, 0, 31, 31
        li r3, 17
        cmpwi cr0, r2, 0
        bne .LBB_test_2 ;
.LBB_test_1:    ;
        li r3, 1
.LBB_test_2:    ;
        blr

instead of:

_test:
        rlwinm r2, r3, 0, 31, 31
        li r2, 17
        cmpwi cr0, r3, 0
        bne .LBB_test_2 ;
.LBB_test_1:    ;
        li r2, 1
.LBB_test_2:    ;
        or r3, r2, r2
        blr

for:

int %test(bool %c) {
        %retval = select bool %c, int 17, int 1
        ret int %retval
}


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22947 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-21 18:03:09 +00:00
Jim Laskey
cb6682fa44 Culling out use of unions for converting FP to bits and vice versa. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22838 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-17 19:34:49 +00:00
Jim Laskey
02659d2363 Switched to using BitsToDouble for int_to_float to avoid aliasing problem. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22831 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-17 17:42:52 +00:00
Jim Laskey
491dfa88e4 Change hex float constants for the sake of VC++. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22828 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-17 09:44:59 +00:00
Jim Laskey
6269ed125f Added generic code expansion for [signed|unsigned] i32 to [f32|f64] casts in the 
legalizer.  PowerPC now uses this expansion instead of ISel version.

Example:

// signed integer to double conversion
double f1(signed x) {
  return (double)x;
}

// unsigned integer to double conversion
double f2(unsigned x) {
  return (double)x;
}

// signed integer to float conversion
float f3(signed x) {
  return (float)x;
}

// unsigned integer to float conversion
float f4(unsigned x) {
  return (float)x;
}


Byte Code:

internal fastcc double %_Z2f1i(int %x) {
entry:
        %tmp.1 = cast int %x to double          ; <double> [#uses=1]
        ret double %tmp.1
}

internal fastcc double %_Z2f2j(uint %x) {
entry:
        %tmp.1 = cast uint %x to double         ; <double> [#uses=1]
        ret double %tmp.1
}

internal fastcc float %_Z2f3i(int %x) {
entry:
        %tmp.1 = cast int %x to float           ; <float> [#uses=1]
        ret float %tmp.1
}

internal fastcc float %_Z2f4j(uint %x) {
entry:
        %tmp.1 = cast uint %x to float          ; <float> [#uses=1]
        ret float %tmp.1
}

internal fastcc double %_Z2g1i(int %x) {
entry:
        %buffer = alloca [2 x uint]             ; <[2 x uint]*> [#uses=3]
        %tmp.0 = getelementptr [2 x uint]* %buffer, int 0, int 0                ; <uint*> [#uses=1]
        store uint 1127219200, uint* %tmp.0
        %tmp.2 = cast int %x to uint            ; <uint> [#uses=1]
        %tmp.3 = xor uint %tmp.2, 2147483648            ; <uint> [#uses=1]
        %tmp.5 = getelementptr [2 x uint]* %buffer, int 0, int 1                ; <uint*> [#uses=1]
        store uint %tmp.3, uint* %tmp.5
        %tmp.9 = cast [2 x uint]* %buffer to double*            ; <double*> [#uses=1]
        %tmp.10 = load double* %tmp.9           ; <double> [#uses=1]
        %tmp.13 = load double* cast (long* %signed_bias to double*)             ; <double> [#uses=1]
        %tmp.14 = sub double %tmp.10, %tmp.13           ; <double> [#uses=1]
        ret double %tmp.14
}

internal fastcc double %_Z2g2j(uint %x) {
entry:
        %buffer = alloca [2 x uint]             ; <[2 x uint]*> [#uses=3]
        %tmp.0 = getelementptr [2 x uint]* %buffer, int 0, int 0                ; <uint*> [#uses=1]
        store uint 1127219200, uint* %tmp.0
        %tmp.1 = getelementptr [2 x uint]* %buffer, int 0, int 1                ; <uint*> [#uses=1]
        store uint %x, uint* %tmp.1
        %tmp.4 = cast [2 x uint]* %buffer to double*            ; <double*> [#uses=1]
        %tmp.5 = load double* %tmp.4            ; <double> [#uses=1]
        %tmp.8 = load double* cast (long* %unsigned_bias to double*)            ; <double> [#uses=1]
        %tmp.9 = sub double %tmp.5, %tmp.8              ; <double> [#uses=1]
        ret double %tmp.9
}

internal fastcc float %_Z2g3i(int %x) {
entry:
        %buffer = alloca [2 x uint]             ; <[2 x uint]*> [#uses=3]
        %tmp.0 = getelementptr [2 x uint]* %buffer, int 0, int 0                ; <uint*> [#uses=1]
        store uint 1127219200, uint* %tmp.0
        %tmp.2 = cast int %x to uint            ; <uint> [#uses=1]
        %tmp.3 = xor uint %tmp.2, 2147483648            ; <uint> [#uses=1]
        %tmp.5 = getelementptr [2 x uint]* %buffer, int 0, int 1                ; <uint*> [#uses=1]
        store uint %tmp.3, uint* %tmp.5
        %tmp.9 = cast [2 x uint]* %buffer to double*            ; <double*> [#uses=1]
        %tmp.10 = load double* %tmp.9           ; <double> [#uses=1]
        %tmp.13 = load double* cast (long* %signed_bias to double*)             ; <double> [#uses=1]
        %tmp.14 = sub double %tmp.10, %tmp.13           ; <double> [#uses=1]
        %tmp.16 = cast double %tmp.14 to float          ; <float> [#uses=1]
        ret float %tmp.16
}

internal fastcc float %_Z2g4j(uint %x) {
entry:
        %buffer = alloca [2 x uint]             ; <[2 x uint]*> [#uses=3]
        %tmp.0 = getelementptr [2 x uint]* %buffer, int 0, int 0                ; <uint*> [#uses=1]
        store uint 1127219200, uint* %tmp.0
        %tmp.1 = getelementptr [2 x uint]* %buffer, int 0, int 1                ; <uint*> [#uses=1]
        store uint %x, uint* %tmp.1
        %tmp.4 = cast [2 x uint]* %buffer to double*            ; <double*> [#uses=1]
        %tmp.5 = load double* %tmp.4            ; <double> [#uses=1]
        %tmp.8 = load double* cast (long* %unsigned_bias to double*)            ; <double> [#uses=1]
        %tmp.9 = sub double %tmp.5, %tmp.8              ; <double> [#uses=1]
        %tmp.11 = cast double %tmp.9 to float           ; <float> [#uses=1]
        ret float %tmp.11
}


PowerPC Code:

        .machine ppc970


        .const
        .align  2
.CPIl1__Z2f1i_0:                                        ; float 0x4330000080000000
        .long   1501560836      ; float 4.5036e+15
        .text
        .align  2
        .globl  l1__Z2f1i
l1__Z2f1i:
.LBBl1__Z2f1i_0:        ; entry
        xoris r2, r3, 32768
        stw r2, -4(r1)
        lis r2, 17200
        stw r2, -8(r1)
        lfd f0, -8(r1)
        lis r2, ha16(.CPIl1__Z2f1i_0)
        lfs f1, lo16(.CPIl1__Z2f1i_0)(r2)
        fsub f1, f0, f1
        blr


        .const
        .align  2
.CPIl2__Z2f2j_0:                                        ; float 0x4330000000000000
        .long   1501560832      ; float 4.5036e+15
        .text
        .align  2
        .globl  l2__Z2f2j
l2__Z2f2j:
.LBBl2__Z2f2j_0:        ; entry
        stw r3, -4(r1)
        lis r2, 17200
        stw r2, -8(r1)
        lfd f0, -8(r1)
        lis r2, ha16(.CPIl2__Z2f2j_0)
        lfs f1, lo16(.CPIl2__Z2f2j_0)(r2)
        fsub f1, f0, f1
        blr


        .const
        .align  2
.CPIl3__Z2f3i_0:                                        ; float 0x4330000080000000
        .long   1501560836      ; float 4.5036e+15
        .text
        .align  2
        .globl  l3__Z2f3i
l3__Z2f3i:
.LBBl3__Z2f3i_0:        ; entry
        xoris r2, r3, 32768
        stw r2, -4(r1)
        lis r2, 17200
        stw r2, -8(r1)
        lfd f0, -8(r1)
        lis r2, ha16(.CPIl3__Z2f3i_0)
        lfs f1, lo16(.CPIl3__Z2f3i_0)(r2)
        fsub f0, f0, f1
        frsp f1, f0
        blr


        .const
        .align  2
.CPIl4__Z2f4j_0:                                        ; float 0x4330000000000000
        .long   1501560832      ; float 4.5036e+15
        .text
        .align  2
        .globl  l4__Z2f4j
l4__Z2f4j:
.LBBl4__Z2f4j_0:        ; entry
        stw r3, -4(r1)
        lis r2, 17200
        stw r2, -8(r1)
        lfd f0, -8(r1)
        lis r2, ha16(.CPIl4__Z2f4j_0)
        lfs f1, lo16(.CPIl4__Z2f4j_0)(r2)
        fsub f0, f0, f1
        frsp f1, f0
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22814 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-17 00:39:29 +00:00
Chris Lattner
d5d0f9bd20 Eliminate the RegSDNode class, which 3 nodes (CopyFromReg/CopyToReg/ImplicitDef) 
used to tack a register number onto the node.

Instead of doing this, make a new node, RegisterSDNode, which is a leaf
containing a register number.  These three operations just become normal
DAG nodes now, instead of requiring special handling.

Note that with this change, it is no longer correct to make illegal
CopyFromReg/CopyToReg nodes.  The legalizer will not touch them, and this
is bad, so don't do it. :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22806 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-16 21:55:35 +00:00
Nate Begeman
7cbd525ba8 Implement BR_CC and BRTWOWAY_CC. This allows the removal of a rather nasty 
fixme from the PowerPC backend.  Emit slightly better code for legalizing
select_cc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22805 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-16 19:49:35 +00:00
Chris Lattner
149c58ce0b Add some methods for dag->dag isel. 
Split RemoveNodeFromCSEMaps out of DeleteNodesIfDead to do it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22801 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-16 18:17:10 +00:00
Nate Begeman
2d56e72f09 Fix last night's PPC32 regressions by 
1. Not selecting the false value of a select_cc in the false arm, which
   isn't legal for nested selects.
2. Actually returning the node we created and Legalized in the FP_TO_UINT
   Expander.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22789 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-14 18:38:32 +00:00
Nate Begeman
d2558e3e4a Teach the legalizer how to legalize FP_TO_UINT. 
Teach the legalizer to promote FP_TO_UINT to FP_TO_SINT if the wider
  FP_TO_UINT is also illegal.  This allows us on PPC to codegen
  unsigned short foo(float a) { return a; }

as:
_foo:
.LBB_foo_0:     ; entry
        fctiwz f0, f1
        stfd f0, -8(r1)
        lwz r2, -4(r1)
        rlwinm r3, r2, 0, 16, 31
        blr

instead of:
_foo:
.LBB_foo_0:     ; entry
        fctiwz f0, f1
        stfd f0, -8(r1)
        lwz r2, -4(r1)
        lis r3, ha16(.CPI_foo_0)
        lfs f0, lo16(.CPI_foo_0)(r3)
        fcmpu cr0, f1, f0
        blt .LBB_foo_2  ; entry
.LBB_foo_1:     ; entry
        fsubs f0, f1, f0
        fctiwz f0, f0
        stfd f0, -16(r1)
        lwz r2, -12(r1)
        xoris r2, r2, 32768
.LBB_foo_2:     ; entry
        rlwinm r3, r2, 0, 16, 31
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22785 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-14 01:20:53 +00:00
Nate Begeman
e5d63829fd Some SELECT_CC cleanups: 
1. move assertions for node creation to getNode()
2. legalize the values returned in ExpandOp immediately
3. Move select_cc optimizations from SELECT's getNode() to SELECT_CC's,
   allowing them to be cleaned up significantly.

This paves the way to pick up additional optimizations on SELECT_CC, such
as sum-of-absolute-differences.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22757 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-11 01:12:20 +00:00
Nate Begeman
9373a81e53 Add new node, SELECT_CC. This node is for targets that don't natively 
implement SELECT.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22755 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-10 20:51:12 +00:00
Chris Lattner
7cf7e3f33f Eliminate the SetCCSDNode in favor of a CondCodeSDNode class. This pulls the 
CC out of the SetCC operation, making SETCC a standard ternary operation and
CC's a standard DAG leaf.  This will make it possible for other node to use
CC's as operands in the future...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22728 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-09 20:20:18 +00:00
Chris Lattner
82299e7097 Change FindEarliestCallSeqEnd (used by libcall insertion) to use a set to 
avoid revisiting nodes more than once.  This eliminates a source of
potentially exponential behavior.  For a small function in 191.fma3d
(hexah_stress_divergence_), this speeds up isel from taking > 20mins to
taking 0.07s.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22680 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-05 18:10:27 +00:00
Chris Lattner
2f4eca30d1 Fix a latent bug in the libcall inserter that was exposed by Nate's patch 
yesterday.  This fixes whetstone and a bunch of programs in the External tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22678 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-05 16:23:57 +00:00
Nate Begeman
2ac4fc0320 Fix a fixme in LegalizeDAG 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22661 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-04 21:43:28 +00:00
Chris Lattner
4c64dd7977 Fix PR611, codegen'ing SREM of FP operands to fmod or fmodf instead of 
the sequence used for integer ops


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22629 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-03 20:31:37 +00:00
Chris Lattner
e21c305ed8 Fix casts from long to sbyte on ppc 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22570 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-01 18:16:37 +00:00
Jeff Cohen
d29b6aa608 Keep tabs and trailing spaces out. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22565 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-30 18:33:25 +00:00
Chris Lattner
f20d183c22 fix float->long conversions on x86 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22563 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-30 01:40:57 +00:00
Chris Lattner
f1fa74ee0d Allow targets to have custom expanders for FP_TO_*INT conversions where 
both the src and dest values are legal


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22555 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-30 00:04:12 +00:00
Chris Lattner
80a3e94653 Allow targets to define custom expanders for FP_TO_*INT 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22548 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-29 00:33:32 +00:00
Chris Lattner
1618bebcf6 allow a target to request that unknown FP_TO_*INT conversion be promoted to 
a larger integer destination.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22547 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-29 00:11:56 +00:00
Chris Lattner
fa9c801a6b instead of having all conversions be handled by one case value, and then have 
subcases inside, break things out earlier.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22546 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-28 23:31:12 +00:00
Jeff Cohen
00b16889ab Eliminate all remaining tabs and trailing spaces. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22523 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-27 06:12:32 +00:00
Chris Lattner
f4d32726e6 The assertion was wrong: the code only worked for i64. While we're at it, 
expand the code to work for all integer datatypes.  This should unbreak
alpha.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22464 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-18 04:31:14 +00:00
Nate Begeman
5a8441ea3f Teach the legalizer how to promote SINT_TO_FP to a wider SINT_TO_FP that 
the target natively supports.  This eliminates some special-case code from
the x86 backend and generates better code as well.

For an i8 to f64 conversion, before & after:

_x87 before:
        subl $2, %esp
        movb 6(%esp), %al
        movsbw %al, %ax
        movw %ax, (%esp)
        filds (%esp)
        addl $2, %esp
        ret

_x87 after:
        subl $2, %esp
        movsbw 6(%esp), %ax
        movw %ax, (%esp)
        filds (%esp)
        addl $2, %esp
        ret

_sse before:
        subl $12, %esp
        movb 16(%esp), %al
        movsbl %al, %eax
        cvtsi2sd %eax, %xmm0
        addl $12, %esp
        ret

_sse after:
        subl $12, %esp
        movsbl 16(%esp), %eax
        cvtsi2sd %eax, %xmm0
        addl $12, %esp
        ret


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22452 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-16 02:02:34 +00:00
Chris Lattner
cad063f1a8 Break the code for expanding UINT_TO_FP operations out into its own 
SelectionDAGLegalize::ExpandLegalUINT_TO_FP method.

Add a new method, PromoteLegalUINT_TO_FP, which allows targets to request
that UINT_TO_FP operations be promoted to a larger input type.  This is
useful for targets that have some UINT_TO_FP or SINT_TO_FP operations but
not all of them (like X86).

The same should be done with SINT_TO_FP, but this patch does not do that
yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22447 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-16 00:19:57 +00:00
Chris Lattner
c087a43510 Fix Alpha/2005-07-12-TwoMallocCalls.ll and PR593. 
It is not safe to call LegalizeOp on something that has already been legalized.
Instead, just force another iteration of legalization.

This could affect all platforms but X86, as this codepath is dynamically
dead on X86 (ISD::MEMSET and friends are legal).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22419 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-13 02:00:04 +00:00
Chris Lattner
6814f1522d Fix test/Regression/CodeGen/Generic/2005-07-12-memcpy-i64-length.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22417 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-13 01:42:45 +00:00
Chris Lattner
5f056bf4b8 Change *EXTLOAD to use an VTSDNode operand instead of being an MVTSDNode. 
This is the last MVTSDNode.

This allows us to eliminate a bunch of special case code for handling
MVTSDNodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22367 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-10 01:55:33 +00:00
Chris Lattner
9fadb4c1c0 Change TRUNCSTORE to use a VTSDNode operand instead of being an MVTSTDNode 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22366 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-10 00:29:18 +00:00
Chris Lattner
15e4b01920 Introduce a new VTSDNode class with the ultimate goal of eliminating the 
MVTSDNode class.  This class is used to provide an operand to operators
that require an extra type.  We start by converting FP_ROUND_INREG and
SIGN_EXTEND_INREG over to using it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22364 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-10 00:07:11 +00:00
Andrew Lenharth
f2eb1396b8 2 fixes: 
1: Legalize operand in UINT_TO_FP expanision

2: SRA x, const i8 was not promoting the constant to shift amount type.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22337 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-05 19:52:39 +00:00
Andrew Lenharth
c6bead211b I really didn't think this was necessary. But, Legalize wasn't running again 
and legalizing the extload.  Strange.  Should fix most alpha regressions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22329 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-02 20:58:53 +00:00
Andrew Lenharth
31559081a4 oops 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22320 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-06-30 19:32:57 +00:00
Andrew Lenharth
9d416f713e FP EXTLOAD is not support on all archs, expand to LOAD and FP_EXTEND 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22319 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-06-30 19:22:37 +00:00
Andrew Lenharth
f4b3278aeb Adapt the code for handling uint -> fp conversion for the 32 bit case to 
handling it in the 64 bit case.  The two code paths should probably be merged.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22302 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-06-27 23:28:32 +00:00
Chris Lattner
2789bde57f allow token chain at start or end of node 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22020 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-14 08:34:53 +00:00
Chris Lattner
3e01136f9f remove special case hacks for readport/readio from the binary operator 
codepath


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22019 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-14 07:45:46 +00:00
Chris Lattner
adf6c2a0cb Eliminate special purpose hacks for dynamic_stack_alloc. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22015 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-14 07:29:57 +00:00
Chris Lattner
e89083a930 Use the general mechanism for creating multi-value nodes instead of using 
special case hacks.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22014 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-14 07:25:05 +00:00
Chris Lattner
d73cc5d058 legalize target-specific operations 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22010 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-14 06:34:48 +00:00
Chris Lattner
50381b6c41 LowerOperation takes a dag 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22004 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-14 05:50:48 +00:00
Chris Lattner
a88a260dbd Allow targets to have a custom int64->fp expander if desired 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22001 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-14 05:33:54 +00:00
Chris Lattner
adf6a965a3 Add an isTailCall flag to LowerCallTo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21958 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-13 18:50:42 +00:00
Chris Lattner
d71c04199c Handle TAILCALL node 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21957 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-13 18:43:43 +00:00
Chris Lattner
eb516e7f0a Fix a problem that nate reduced for me. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21923 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-13 05:17:00 +00:00
Chris Lattner
9530ddcc60 rename variables and functions to match renamed DAG nodes. Bonus feature: 
I can actually remember which one is which now!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21922 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-13 05:09:11 +00:00
Chris Lattner
66de05b606 do not call expandop on the same value more than once. This fixes 
X86/2004-02-22-Casts.llx


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21919 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-13 04:45:13 +00:00