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149 Commits

Author SHA1 Message Date
Eric Christopher
b371658083 Don't need to save piecemeal now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119862 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-19 22:39:56 +00:00
Eric Christopher
2d630d7bc9 Update comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119861 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-19 22:37:58 +00:00
Eric Christopher
88de86b550 Update comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119859 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-19 22:36:41 +00:00
Eric Christopher
0d58122e12 Refactor address mode handling into a single struct (ala x86), this 
should give allow a wider range of addressing modes.

No functional change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119856 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-19 22:30:02 +00:00
Jim Grosbach
3ea4daaf50 Remove hard tabs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119810 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-19 18:01:37 +00:00
Eric Christopher
76dda7ec1d Recommit this change and remove the failing part of the test - it didn't 
pass in the first place and was masked by earlier failures not warning
and aborting the block.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119184 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-15 21:11:06 +00:00
Eric Christopher
84e86c0156 Temporarily revert this. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118946 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-12 23:50:48 +00:00
Eric Christopher
c0394c0b8c Make this happen for ARM like x86. Don't entirely bail out when 
an address is in a different block, get it into a register and go
from there.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118936 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-12 22:52:32 +00:00
Eric Christopher
d0c82a683e Fix up a few more spots of addrmode2 (or not) changes that were 
missed. Update some comments accordingly.

Fixes rdar://8652289


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118888 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-12 09:48:30 +00:00
Jim Grosbach
16cb3763c5 Trailing whitespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118606 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-09 19:22:26 +00:00
Eric Christopher
5e262bc943 Make sure we have movw on the target before using it. 
Fixes 8559.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118333 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-06 07:53:11 +00:00
Duncan Sands
1e96bab329 In the calling convention logic, ValVT is always a legal type, 
and as such can be represented by an MVT - the more complicated
EVT is not needed.  Use MVT for ValVT everywhere.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118245 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-04 10:49:57 +00:00
Eric Christopher
e5b13cfdd0 Optimize generated code for integer materialization a bit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118192 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-03 20:21:17 +00:00
Duncan Sands
cdfad36b40 Simplify uses of MVT and EVT. An MVT can be compared directly 
with a SimpleValueType, while an EVT supports equality and
inequality comparisons with SimpleValueType.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118169 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-03 12:17:33 +00:00
Duncan Sands
1440e8b918 Inside the calling convention logic LocVT is always a simple 
value type, so there is no point in passing it around using
an EVT.  Use the simpler MVT everywhere.  Rather than trying
to propagate this information maximally in all the code that
using the calling convention stuff, I chose to do a mainly
low impact change instead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118167 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-03 11:35:31 +00:00
Eric Christopher
000cf708ef Invert these branches by default, it makes assembly comparisons a little 
easier to read.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118148 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-03 04:29:11 +00:00
Eric Christopher
4c914125c4 Make sure we're only storing a single bit here. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118126 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-02 23:59:09 +00:00
Eric Christopher
4053e63a4b Remove an assert - it's possible to be hit, and we just want to avoid 
handling those cases for now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117996 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-02 01:24:49 +00:00
Eric Christopher
61d69da051 Whitespeace 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117995 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-02 01:22:45 +00:00
Eric Christopher
aaa8df4cad No really, no thumb1 for arm fast isel. Also add an informative comment as 
to what someone would need to do to support thumb1.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117994 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-02 01:21:28 +00:00
Eric Christopher
76d61478df Make sure we have a legal type (and simple) before continuing. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117848 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-30 21:25:26 +00:00
Eric Christopher
0e6233bfd7 Handle comparison values we already have - this fixes the consumer-typeset 
failure for llvm-gcc on arm fast isel.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117710 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-29 21:08:19 +00:00
Jim Grosbach
7e3383c007 Refactor ARM STR/STRB instruction patterns into STR{B}i12 and STR{B}rs, like 
the LDR instructions have. This makes the literal/register forms of the
instructions explicit and allows us to assign scheduling itineraries
appropriately. rdar://8477752

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117505 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 23:12:14 +00:00
Jim Grosbach
6b15639e26 Trailing whitespace 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117496 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 21:39:08 +00:00
Jim Grosbach
c1d30212e9 Split ARM::LDRB into LDRBi12 and LDRBrs. Adjust accordingly. Continuing on 
rdar://8477752.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117419 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 00:19:44 +00:00
Jim Grosbach
3e55612472 First part of refactoring ARM addrmode2 (load/store) instructions to be more 
explicit about the operands. Split out the different variants into separate
instructions. This gives us the ability to, among other things, assign
different scheduling itineraries to the variants. rdar://8477752.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117409 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-26 22:37:02 +00:00
Eric Christopher
a4633f5d74 Move rejection of NEON parameters earlier in fast isel call processing, 
note that we can actually handle some f64 arguments.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117209 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-23 09:37:17 +00:00
Evan Cheng
1f8b40d51c Silence compiler warnings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117128 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-22 18:57:05 +00:00
Eric Christopher
4f512efee9 Add some basic ret instruction support to arm fast-isel. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117085 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-22 01:28:00 +00:00
Eric Christopher
1778772d1b These don't need to be virtual. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117068 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-21 21:47:51 +00:00
Eric Christopher
5b924809e4 Handle storing args to the stack for calls. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117055 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-21 20:09:54 +00:00
Eric Christopher
212ae937bb More load/store refactoring, call reg+offset simplification from within 
the emitter to handle the addresses. Only simplify the offset if we need
to - also fix bug where in addrmode 5 we weren't dividing the offset by
4, which showed up due to not always lowering.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117051 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-21 19:40:30 +00:00
Eric Christopher
2d8f6fe610 Custom lower f64 args passed in integer registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116977 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-21 00:01:47 +00:00
Eric Christopher
3659ac22c0 Fix a TODO by removing some unnecesary copies. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116915 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-20 08:02:24 +00:00
Eric Christopher
6e5367d6a3 Revert r116220 - thus turning arm fast isel back on by default. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116762 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-18 22:53:53 +00:00
Eric Christopher
4cf34c6c04 Remove the check for invalid calling conventions. Testing shows that they're 
working just fine.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116698 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-18 06:49:12 +00:00
Eric Christopher
fa87d66752 Lift arg promotion from the X86 backend. This should be unified at some point. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116694 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-18 02:17:53 +00:00
Eric Christopher
404be0c04f Now that we handle all allocas via a non-SP reg offset remove all of the 
special case handling for ARM::SP.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116688 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-17 11:08:44 +00:00
Eric Christopher
ec8bf972f5 Allow more load types to be materialized through the allocas. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116683 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-17 06:07:26 +00:00
Eric Christopher
d56d61af01 Optimize GEP off of intermediate allocas. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116681 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-17 01:51:42 +00:00
Eric Christopher
7208dbf2d5 Fix comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116680 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-17 01:42:53 +00:00
Eric Christopher
dc0b0ef6cd Turn on AddOperator folding in GEP. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116679 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-17 01:41:46 +00:00
Eric Christopher
45c607134b Use the i12 immediate versions of the load instructions - they're handled 
more in the post-passes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116678 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-17 01:40:27 +00:00
Eric Christopher
47650ece37 Fix some funky formatting that got through. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116653 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-16 01:10:35 +00:00
Eric Christopher
c9a91fdaf9 Make sure offset is 0 for load/store register to the stack call. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116640 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-15 23:07:10 +00:00
Eric Christopher
315030ca74 Fix else if -> if in store machinery. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116628 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-15 22:32:37 +00:00
Eric Christopher
a322425642 Refactor ARM fast-isel reg + offset to be a base + offset. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116622 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-15 21:32:12 +00:00
Eric Christopher
2896df897c Expand GEP handling for constant offsets. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116594 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-15 18:02:07 +00:00
Eric Christopher
eae8439771 Handle more complex GEP based loads and add a few TODOs to deal with 
GEP + alloca.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116474 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-14 09:29:41 +00:00
Jim Grosbach
95369599c6 A few 80 column fixes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116451 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-13 23:34:31 +00:00