Commit Graph

77 Commits

Author SHA1 Message Date
87f8bf65dd If target decides to create an emergency spill slot, make sure it's closest to SP or frame pointer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34965 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-06 10:02:38 +00:00
a81a5ab357 Delete register scavenger when done with it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34786 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-01 10:23:33 +00:00
23322d1427 Interface clean up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34772 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-01 02:25:51 +00:00
e5876ce21a add a newline at end of file
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34735 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-28 06:42:11 +00:00
36230cdda4 Make requiresRegisterScavenging determination on a per MachineFunction basis.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34711 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-28 00:59:19 +00:00
37f15a6d48 MRegisterInfo disowns RegScavenger. It's immutable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34706 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-28 00:17:36 +00:00
3f6fd87473 Let MRegisterInfo now owns RegScavenger.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34691 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-27 21:10:33 +00:00
ed570dedad forward() should not increment internal iterator. Its client may insert instruction between now and next forward() call.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34649 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-27 01:58:48 +00:00
49dd06461a First potential client of register scavenger.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34516 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-23 01:11:26 +00:00
44c3b9fdd4 Change the MachineDebugInfo to MachineModuleInfo to better reflect usage
for debugging and exception handling.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33550 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-26 21:22:28 +00:00
02a2029141 Added a MRegisterInfo hook that tells PEI the target is responsible for
rounding the stack frame to a multiple of stack alignment.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33504 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-25 22:12:41 +00:00
367372a30c PEI is now responsible for adding MaxCallFrameSize to frame size and align the stack. Each target can further adjust the frame size if necessary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33460 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-23 09:38:11 +00:00
70cfa88944 Remove an unused variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33396 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-20 09:21:54 +00:00
57a2306074 We not align the final stack slot but instead let the target do so in emitPrologue(). Each target can make adjustments to the stack frame and re-align the stack as it deem appropriate. Do not align it twice which can end up wasting stack space.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33387 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-20 02:07:13 +00:00
ad93d7fda5 - Fixing naming inconsistency: calleesave -> calleesaved.
- Make use of spillCalleeSavedRegisters() and restoreCalleeSavedRegisters().


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32822 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-02 21:31:15 +00:00
7d3223eef2 Initialize {Min|Max}CSFrameIndex properly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32299 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-07 02:25:34 +00:00
5feaa9a707 TargetRegisterClass specifies the desired spill alignment. However, it cannot be honored if stack alignment is smaller.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30648 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-28 18:52:32 +00:00
c2b4ec37de PEI now place callee save spills closest to the address pointed to by the
incoming stack. This allows X86 backend to use push / pop in epilogue /
prologue.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30636 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-28 00:10:27 +00:00
692d4e0823 Rename function. It's determining which callee-save registers to save.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30616 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-26 22:29:31 +00:00
a4f0b3a084 s|llvm/Support/Visibility.h|llvm/Support/Compiler.h|
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29911 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-27 12:54:02 +00:00
08ede262a7 Tidy up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29888 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-25 22:56:30 +00:00
f3e4f0e615 Consolidate callee saved register information so that it can me used by debug
information and exception handling.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29881 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-25 19:45:51 +00:00
f8c68f694c Shave another 27K off libllvmgcc.dylib with visibility hidden
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28973 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-28 22:17:39 +00:00
c485e55c65 Remove dead variable
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28253 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-12 18:02:04 +00:00
4188699f80 Foundation for call frame information.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27491 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-07 16:34:46 +00:00
4672f71ac4 The stack alignment is now computed dynamically, just verify it is correct.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27380 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-03 21:39:57 +00:00
cbef8ba5f9 Always compute max align.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24227 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-06 17:43:20 +00:00
ae232e7a10 Add the necessary support to the ISel to allow targets to codegen the new
alignment information appropriately.  Includes code for PowerPC to support
fixed-size allocas with alignment larger than the stack.  Support for
arbitrarily aligned dynamic allocas coming soon.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24224 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-06 09:00:38 +00:00
8fb040e584 now that we have a reg class to spill with, get this info from the regclass
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23559 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-30 17:19:22 +00:00
80a4f169b4 Now that we have getCalleeSaveRegClasses() info, use it to pass the register
class into the spill/reload methods.  Targets can now rely on that argument.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23556 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-30 16:59:07 +00:00
bf9716b9c4 Change this code ot pass register classes into the stack slot spiller/reloader
code.  PrologEpilogInserter hasn't been updated yet though, so targets cannot
use this info.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23536 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-30 01:29:00 +00:00
dfd58709cc Fix a bug in my previous patch that was using the wrong iterator. This fixes
Olden/bisort among others.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23124 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-29 00:10:46 +00:00
ed461e0faf Make this code safe for when loadRegFromStackSlot inserts multiple instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23108 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-26 22:18:32 +00:00
4fc997941d When inserting callee-save register reloads, make sure to skip over any
terminator instructions before the 'ret' in case the target has a
multi-instruction return sequence.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22041 91177308-0d34-0410-b5e6-96231b3b80d8
2005-05-15 03:09:58 +00:00
2a82ef317c Tolerate instrs with extra args
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21982 91177308-0d34-0410-b5e6-96231b3b80d8
2005-05-13 21:07:15 +00:00
edf128a7fa Remove trailing whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21420 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-21 22:36:52 +00:00
3563015b0d Simplify/speedup the PEI by not having to scan for uses of the callee saved
registers.  This information is computed directly by the register allocator
now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19795 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-23 23:13:12 +00:00
92b9fcea7b Speed this up a bit by making ModifiedRegs a vector<char> not vector<bool>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19787 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-23 21:45:01 +00:00
5037a15910 Implicitly defined registers can clobber callee saved registers too!
This fixes the return-address-not-being-saved problem in the Alpha backend.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19741 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-22 00:49:16 +00:00
3ca6a2c72c Add an assertion that would have made more sense to duraid
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19704 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-19 21:32:07 +00:00
81ab877a0c Put this change back in after testing from Reid proved its innocence. getSpillSize now returns value in bits
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16102 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-29 22:00:24 +00:00
bd2efb9600 Back out change to divide getSpillSize by 8 until I figure out why it breaks x86, which has register sizes in bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16073 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-27 16:48:24 +00:00
5709998993 Register sizes are in bits, not bytes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16070 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-27 04:28:10 +00:00
7008034c9f Register info alignment is in bits, frame object alignment is (currently) in
bytes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15970 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-21 20:04:59 +00:00
fa1face30a Now that we have per-register spill size/alignment info, remove more uses
of getRegClass


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15967 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-21 19:45:10 +00:00
26eb14ba51 Stop using CreateStackObject(RegClass*)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15775 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-15 22:02:22 +00:00
57f1b67c34 These methods no longer take a TargetRegisterClass* operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15774 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-15 21:56:44 +00:00
8c9b4de574 Make this compile on gc 3.4.1 (static_cast to non-const type was not
allowed).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15766 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-15 09:18:55 +00:00
5de0f7aa14 Elminiate MachineFunction& argument from eliminateFrameIndex
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15736 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-14 22:00:10 +00:00
c330b68fb7 Split saveCallerSavedRegisters into two methods for clarity, and add comments.
Add support for targets that must spill certain physregs at certain locations.

Patch contributed by Nate Begeman, slightly hacked by me.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15701 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-12 19:01:14 +00:00