6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-11-03 14:21:30 +00:00
Code Issues Projects Releases Wiki Activity
20,225 Commits 39 Branches 0 Tags
88add100b3db715df4275c8ab408e6b51f28ff8f
Commit Graph

11132 Commits

Author SHA1 Message Date
Chris Lattner
9944b76cfe Implement most of load support. There is still a bug though. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22959 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-21 22:31:09 +00:00
Chris Lattner
c975e1dedc add anew method 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22957 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-21 22:30:30 +00:00
Chris Lattner
81e72b13d7 Add support for frame index nodes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22956 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-21 19:56:04 +00:00
Chris Lattner
99baddaf57 add a method 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22955 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-21 19:48:59 +00:00
Chris Lattner
1db1adbdee Don't print out the MBB label for the entry mbb 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22953 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-21 19:09:33 +00:00
Chris Lattner
f913d3f91c Simplify the logic for BRTWOWAY_CC handling. The isel code already 
simplifies BRTWOWAY into BR if one of the results is a fall-through.
Unless I'm missing something, there is no reason to duplicate this
in the target-specific code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22952 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-21 19:03:28 +00:00
Chris Lattner
2fbb4579d6 Implement selection for branches. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22951 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-21 18:50:37 +00:00
Chris Lattner
6b09a29604 add a method 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22949 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-21 18:49:33 +00:00
Chris Lattner
f85ab15acf Add support for basic blocks, fix a bug in result # computation 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22948 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-21 18:49:29 +00:00
Chris Lattner
550b1e59c4 When legalizing brcond ->brcc or select -> selectcc, make sure to truncate 
the old condition to a one bit value.  The incoming value must have been
promoted, and the top bits are undefined.  This causes us to generate:

_test:
        rlwinm r2, r3, 0, 31, 31
        li r3, 17
        cmpwi cr0, r2, 0
        bne .LBB_test_2 ;
.LBB_test_1:    ;
        li r3, 1
.LBB_test_2:    ;
        blr

instead of:

_test:
        rlwinm r2, r3, 0, 31, 31
        li r2, 17
        cmpwi cr0, r3, 0
        bne .LBB_test_2 ;
.LBB_test_1:    ;
        li r2, 1
.LBB_test_2:    ;
        or r3, r2, r2
        blr

for:

int %test(bool %c) {
        %retval = select bool %c, int 17, int 1
        ret int %retval
}


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22947 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-21 18:03:09 +00:00
Chris Lattner
4dd4a2d278 If the false value for a select_cc is really simple (has no inputs), evaluate 
it in the block.  This codegens:

int %test(bool %c) {
        %retval = select bool %c, int 17, int 1
        ret int %retval
}

as:

_test:
        rlwinm r2, r3, 0, 31, 31
        li r2, 17
        cmpwi cr0, r3, 0
        bne .LBB_test_2 ;
.LBB_test_1:    ;
        li r2, 1
.LBB_test_2:    ;
        or r3, r2, r2
        blr

instead of:

_test:
        rlwinm r2, r3, 0, 31, 31
        li r2, 17
        li r4, 1
        cmpwi cr0, r3, 0
        bne .LBB_test_2 ;
.LBB_test_1:    ;
        or r2, r4, r4
.LBB_test_2:    ;
        or r3, r2, r2
        blr

... which is one fewer instruction.  The savings are more significant for
global address and constantfp nodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22946 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-21 17:41:11 +00:00
Duraid Madina
7340dd5d2e reenable collapse of loadimm+AND -> dep.z (thanks guys) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22944 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-21 15:43:53 +00:00
Chris Lattner
fe0c2c8721 fix bogus warning 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22943 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-20 18:07:27 +00:00
Jim Laskey
ffb973df92 Repair an out by one error for IA64. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22942 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-20 11:05:23 +00:00
Chris Lattner
4416f1a0a5 add support for global address, including PIC support. 
This REALLY should be lowered by the legalizer!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22941 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-19 22:38:53 +00:00
Chris Lattner
9b78db7f16 Add support for global address nodes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22940 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-19 22:38:24 +00:00
Chris Lattner
aaaa0b67dd Add support for TargetGlobalAddress nodes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22938 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-19 22:31:04 +00:00
Chris Lattner
7ef330478f Implement CopyFromReg, TokenFactor, and fix a bug in CopyToReg. This allows 
us to compile stuff like this:

double %test(double %A, double %B, double %C, double %E) {
        %F = mul double %A, %A
        %G = add double %F, %B
        %H = sub double -0.0, %G
        %I = mul double %H, %C
        %J = add double %I, %E
        ret double %J
}

to:

_test:
        fnmadd f0, f1, f1, f2
        fmadd f1, f0, f3, f4
        blr

woot!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22937 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-19 21:43:53 +00:00
Chris Lattner
fa164b61d1 Fix a bug in previous commit 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22936 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-19 21:34:13 +00:00
Chris Lattner
7e65997c43 Fix a typeo, no wonder all tokenfactor edges were the same! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22935 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-19 21:33:02 +00:00
Chris Lattner
7228aa7868 Print physreg register nodes with target names (e.g. F1) instead of numbers 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22934 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-19 21:21:16 +00:00
Chris Lattner
0189197608 Before implementing copyfromreg, we'll implement copytoreg correctly. 
This gets us this for the previous testcase:

_test:
        lis r2, 0
        ori r3, r2, 65535
        blr

Note that we actually write to r3 (the return reg) correctly now :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22933 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-19 20:50:53 +00:00
Chris Lattner
4ccd406317 Now that we have operand info for machine instructions, use it to create 
temporary registers for things that define a register.  This allows dag->dag
isel to compile this:

int %test() { ret int 65535 }

into:

_test:
        lis r2, 0
        ori r2, r2, 65535
        blr

Next up, getting CopyFromReg to work, allowing arguments and cross-bb values.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22932 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-19 20:45:43 +00:00
Chris Lattner
ecbce617ca Split RegisterClass 'Methods' into MethodProtos and MethodBodies 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22929 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-19 19:13:20 +00:00
Chris Lattner
f0c5f67dbc put reg classes into namespace 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22927 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-19 18:53:43 +00:00
Chris Lattner
fabc8ffacb Put reg classes into namespaces 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22926 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-19 18:52:55 +00:00
Chris Lattner
03ba7b9f25 Put register classes into namespaces 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22925 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-19 18:51:57 +00:00
Chris Lattner
cbec3b00bd Put register classes in namespaces 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22924 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-19 18:50:46 +00:00
Chris Lattner
e7af178ccf Fix code that assumes the register info will be dumped into a target 
namespace instead of the reg class namespace.  Update getRegClassForType()
to use modified names due to tblgen change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22923 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-19 18:50:11 +00:00
Chris Lattner
28e728d75a put reg classes in namespaces 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22922 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-19 18:49:22 +00:00
Chris Lattner
1ff9540c17 Require that targets specify a namespace for their register classes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22921 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-19 18:48:48 +00:00
Chris Lattner
6096f0d4c6 The skeleton target has never had an isel 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22917 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-19 18:35:41 +00:00
Chris Lattner
8212203ab9 This code has always been dead on itanium 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22916 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-19 18:34:37 +00:00
Chris Lattner
5499742c06 This code has always been dead for alpha 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22915 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-19 18:33:26 +00:00
Chris Lattner
2505d6b727 The simple isel being gone makes this dead! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22914 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-19 18:32:03 +00:00
Chris Lattner
0b1e641b82 Now that the simple isels are dead, so is this. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22913 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-19 18:30:39 +00:00
Chris Lattner
c19d5621ae Sparcv9 gets no operand info 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22909 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-19 16:56:56 +00:00
Jeff Cohen
23c73a1823 Fix VC++ constant truncation warning. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22907 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-19 16:19:21 +00:00
Duraid Madina
a91103430b a bugfix (up top) and a quick repair job: disable generation of dep.z 
(which died about a week ago) so we're back to load-(2^n-1)-then-AND
sequences. slow, but things should now be Almost Completely Working,
modulo those pesky alignment/ABI issues.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22904 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-19 13:25:50 +00:00
Jeff Cohen
a92b7c36e9 Fix VC++ precedence warning. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22902 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-19 04:39:48 +00:00
Nate Begeman
27d53ba6dd Fix a bug where we were passing the wrong number of arguments to an 
instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22901 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-19 03:42:28 +00:00
Chris Lattner
ca6aa2f70c Fix computation of # operands, add a temporary hack for CopyToReg 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22896 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-19 01:01:34 +00:00
Chris Lattner
80132a4b48 mark variable arity instructions as such. Alpha wins the battle for 
cleanest backend in this metric :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22893 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-19 00:51:37 +00:00
Chris Lattner
efc58be8ca Mark some instructions as variable_ops, and PSEUDO_ALLOC as taking a GPR. 
I'm not convinced this is all of them,  but I can't do much testing, because
IA64 LLC crashes on big programs :(


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22892 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-19 00:47:42 +00:00
Chris Lattner
9d9dc816d0 add a few missing cases 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22891 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-19 00:41:29 +00:00
Chris Lattner
b822abade7 Give ADJCALLSTACKDOWN/UP the correct operands. 
Give a whole bunch of other stuff variable operands, particularly FP.  The
FP stackifier is playing fast and loose with operands here, so we have to
mark them all as variable.  This will have to be fixed before we can dag->dag
the X86 backend.  The solution is for the pre-stackifier and post-stackifier
instructions to all be disjoint.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22890 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-19 00:38:22 +00:00
Nate Begeman
02b88a4586 ISD::OR, and it's accompanying SelectBitfieldInsert 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22889 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-19 00:38:14 +00:00
Chris Lattner
679c408768 The variable SAR's only take one operand too 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22888 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-19 00:31:37 +00:00
Chris Lattner
fd444b2a69 Stop adding bogus operands to variable shifts on X86. These instructions 
only take one operand.  The other comes implicitly in through CL.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22887 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-19 00:16:17 +00:00
Nate Begeman
73bfa71524 Remove the X86 and PowerPC Simple instruction selectors; their time has 
passed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22886 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-18 23:53:15 +00:00