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62 Commits

Author SHA1 Message Date
Akira Hatanaka
8aaed99a99 [mips] Refactor sign-extension-in-register instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170940 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 22:41:52 +00:00
Akira Hatanaka
7de001b97e [mips] Refactor instructions which copy from and to HI/LO registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170939 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 22:39:17 +00:00
Akira Hatanaka
9bf571fe2c [mips] Refactor SLT (set on less than) instructions. Separate encoding 
information from the rest. 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170664 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 04:27:52 +00:00
Akira Hatanaka
c23061547d [mips] Refactor unconditional branch instruction. Separate encoding information 
from the rest. 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170663 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 04:22:39 +00:00
Akira Hatanaka
1e7739f614 [mips] Remove asm string parameter from pseudo instructions. Add InstrItinClass 
parameter.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170661 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 04:20:09 +00:00
Akira Hatanaka
5c54025645 [mips] Refactor conditional branch instructions with one register operand. 
Separate encoding information from the rest.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170659 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 04:13:23 +00:00
Akira Hatanaka
c488901355 [mips] Refactor conditional branch instructions with two register operands. 
Separate encoding information from the rest.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170657 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 04:10:13 +00:00
Akira Hatanaka
cdc0c59d1e [mips] Refactor shift instructions with register operands. Separate encoding 
information from the rest.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170650 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 03:48:24 +00:00
Akira Hatanaka
0dad34a9bf [mips] Refactor shift immediate instructions. Separate encoding information 
from the rest.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170649 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 03:44:41 +00:00
Akira Hatanaka
ab48c503e2 [mips] Refactor arithmetic and logic instructions with immediate operands. 
Separate encoding information from the rest.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170648 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 03:40:03 +00:00
Akira Hatanaka
23a3da0113 [mips] Refactor arithmetic and logic instructions. Separate encoding 
information from the rest.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170647 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 03:34:05 +00:00
Akira Hatanaka
c567b1cd0d [mips] Delete all floating point instruction classes that are no longer used. 
No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170084 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-13 02:05:02 +00:00
Akira Hatanaka
5c37399279 [mips] Modify definitions of floating point conditional move instructions. 
No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170080 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-13 01:41:15 +00:00
Akira Hatanaka
b573539c6b [mips] Modify definitions of floating point comparison instructions. 
No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170077 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-13 01:34:09 +00:00
Akira Hatanaka
89828a6a56 [mips] Modify definitions of floating point branch instructions. 
No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170076 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-13 01:32:36 +00:00
Akira Hatanaka
2b1a50cfdb [mips] Modify definitions of floating point indexed load and store instructions. 
No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170075 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-13 01:30:49 +00:00
Akira Hatanaka
b2c68ddaab [mips] Modify definitions of floating point multiply-add/sub instructions. 
No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170073 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-13 01:27:48 +00:00
Akira Hatanaka
6f94eb3512 [mips] Modify definitions of floating point load and store instructions. 
No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170072 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-13 01:24:00 +00:00
Akira Hatanaka
be9f72d2d8 [mips] Modify definitions of move from/to coprocessor instructions. 
No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170071 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-13 01:16:49 +00:00
Akira Hatanaka
4b921416b4 [mips] Modify definitions of two register operand floating point instructions. 
No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170069 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-13 01:14:07 +00:00
Akira Hatanaka
82fdad75f7 [mips] Modify definitions of three register operand floating point instructions 
and separate encoding information from the rest.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170066 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-13 01:07:37 +00:00
Akira Hatanaka
10bd726459 [mips] Move classes that do not belong in MipsInstrFormats.td into 
MipsInstrFPU.td.
 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170061 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-13 00:49:23 +00:00
Akira Hatanaka
625cb5ac72 [mips] Remove single-precision floating point instruction from multiclass 
FFR2P_M.
 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170055 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-13 00:35:54 +00:00
Akira Hatanaka
6085780a91 [mips] Remove single-precision floating point instructions from multiclasses 
FFR1_W_M and FFR1P_M. The new instruction definitions have one-to-one
correspondence with the instructions in the ISA manual.
 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170053 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-13 00:29:29 +00:00
Akira Hatanaka
249330eadb [mips] Shorten predicate name. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169579 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-07 03:06:09 +00:00
Jack Carter
de33227462 Adding support for instructions mfc0, mfc2, mtc0, mtc2 
move from and to coprocessors 0 and 2.

Contributer: Vladimir Medic


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165351 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-10-06 01:17:37 +00:00
Jack Carter
9d577c8614 Implement methods that enable expansion of load immediate 
macro instruction (li) in the assembler.

We have identified three possible expansions depending on 
the size of immediate operand:
  1) for 0 ≤ j ≤ 65535.
     li d,j =>
     ori d,$zero,j

  2) for −32768 ≤ j < 0.
     li d,j =>
     addiu d,$zero,j

  3) for any other value of j that is representable as a 32-bit integer.
     li d,j =>
     lui d,hi16(j)
     ori d,d,lo16(j)

All of the above have been implemented in ths patch.

Contributer: Vladimir Medic


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165199 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-10-04 04:03:53 +00:00
Akira Hatanaka
603f69dc2c Define ADJCALLSTACKDOWN/UP nodes. These nodes are emitted regardless of whether 
or not it is in mips16 mode. Define MipsPseudo (mode-independant pseudo) and
PseudoSE (mips32/64 pseudo) classes.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161071 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-07-31 19:13:07 +00:00
Akira Hatanaka
c4388d4199 Change name of class MipsInst to InstSE to distinguish it from mips16's 
instruction class. SE stands for standard encoding.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161069 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-07-31 18:55:01 +00:00
Akira Hatanaka
18f3c78092 This patch adds a predicate to existing mips32 and mips64 so that those 
instruction encodings can be excluded during mips16 processing.

This revision fixes the issue raised by Jim Grosbach.

bool hasStandardEncoding() const { return !inMips16Mode(); }

When micromips is added it will be

bool StandardEncoding() const { return !inMips16Mode()&&  !inMicroMipsMode(); }

No additional testing is needed other than to assure that there is no regression
from this patch.

Patch by Reed Kotler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157234 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-22 03:10:09 +00:00
Akira Hatanaka
ecdc9d5bb2 Add disassembler to MIPS. 
Patch by Vladimir Medic. 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154935 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-17 18:03:21 +00:00
Akira Hatanaka
02365945a6 Revert r153924. There were buildbot failures. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153925 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-03 02:51:09 +00:00
Akira Hatanaka
885020a7a7 MIPS disassembler support. 
Patch by Vladimir Medic.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153924 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-03 02:20:58 +00:00
Akira Hatanaka
dfa27aea12 Fix bugs which were introduced when support for base+index floating point loads 
and stores was added.

- SelectAddr should return false if Parent is an unaligned f32 load or store.
- Only aligned load and store nodes should be matched to select reg+imm
  floating point instructions.
- MIPS does not have support for f64 unaligned load or store instructions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151843 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-03-01 22:12:30 +00:00
Jia Liu
bb481f8820 remove blanks, and some code format 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151625 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-28 07:46:26 +00:00
Akira Hatanaka
44b6c715ac Add support for floating point base register + offset register addressing mode 
load and store instructions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151611 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-28 02:55:02 +00:00
Akira Hatanaka
e4ea241853 Add definitions of floating point multiply add/sub and negative multiply 
add/sub instructions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151415 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-25 00:21:52 +00:00
Bruno Cardoso Lopes
ff452f5349 Use branches instead of jumps + variable cleanup. Testcase coming next. Patch by Jack Carter 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145912 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-06 03:34:48 +00:00
Bruno Cardoso Lopes
c3f16b316a Final patch that completes old JIT support for Mips: 
-Fix binary codes and rename operands in .td files so that automatically
generated function MipsCodeEmitter::getBinaryCodeForInstr gives correct
encoding for instructions.
-Define new class FMem for instructions that access memory.
-Define new class FFRGPR for instructions that move data between GPR and
FPU general and control registers.
-Define custom encoder methods for memory operands, and also for size
operands of ext and ins instructions.
-Only static relocation model is currently implemented.

Patch by Sasa Stankovic

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142378 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-18 17:50:36 +00:00
Akira Hatanaka
8f3af87e99 Move class and instruction definitions for conditional moves to a seperate file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142220 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-17 18:43:19 +00:00
Akira Hatanaka
3e3427a5c3 Add support for conditional branch instructions with 64-bit register operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141694 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 18:49:17 +00:00
Akira Hatanaka
c9289f6a71 Define classes and multiclasses for FP binary instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141475 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-08 03:38:41 +00:00
Akira Hatanaka
a8de1c1be0 Define classes for FP unary instructions and multiclasses for FP-to-fixed point 
conversion instructions. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141473 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-08 03:19:38 +00:00
Akira Hatanaka
854222fa47 Mark MipsPseudo isPseudo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140598 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-27 04:57:54 +00:00
Akira Hatanaka
667645f814 Changed definition of EXT and INS per Bruno's comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137892 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-17 22:59:46 +00:00
Akira Hatanaka
bb15e117d3 Add support for ext and ins. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137804 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-17 02:05:42 +00:00
Eric Christopher
49ac3d7da9 Fix td file comments for Mips. 
Patch by Liu <proljc@gmail.com>!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131086 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-09 18:16:46 +00:00
Akira Hatanaka
4552c9a3b3 Reverse unnecessary changes made in r129606 and r129608. There is no change in functionality. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129612 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-15 21:51:11 +00:00
Akira Hatanaka
0bf3dfbef6 Fix lines that have incorrect indentation or exceed 80 columns. There is no change in functionality. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129606 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-15 21:00:26 +00:00
Akira Hatanaka
1d6b38d9d3 Added support for FP conditional move instructions and fixed bugs in handling of FP comparisons. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128650 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-31 18:26:17 +00:00