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90 Commits

Author SHA1 Message Date
Jeffrey Yasskin
75402822d6 r76102 added the MachineCodeEmitter::processDebugLoc call and called it from 
the X86 Emitter.  This patch extends that to the rest of the targets that can
write to a MachineCodeEmitter: ARM, Alpha, and PPC.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76211 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-17 18:49:39 +00:00
Torok Edwin
c23197a26f llvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE->llvm_unreachable. 
This adds location info for all llvm_unreachable calls (which is a macro now) in
!NDEBUG builds.
In NDEBUG builds location info and the message is off (it only prints
"UREACHABLE executed").


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75640 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-14 16:55:14 +00:00
Torok Edwin
29fd056d81 Remove extra \n from LLVM_UNREACHABLE calls. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75416 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-12 07:15:17 +00:00
Evan Cheng
e7cbe4118b Change how so_imm and t2_so_imm are handled. At instruction selection time, the immediates are no longer encoded in the imm8 + rot format, that are left as it is. The encoding is now done in ams printing and code emission time instead. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75048 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-08 21:03:57 +00:00
Torok Edwin
dac237e182 Implement changes from Chris's feedback. 
Finish converting lib/Target.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75043 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-08 20:53:28 +00:00
Torok Edwin
ab7c09b6b6 Start converting to new error handling API. 
cerr+abort -> llvm_report_error
assert(0)+abort -> LLVM_UNREACHABLE (assert(0)+llvm_unreachable-> abort() included)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75018 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-08 18:01:40 +00:00
Evan Cheng
c9a4153eef Add a todo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74976 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-08 00:05:05 +00:00
Evan Cheng
bc8a94540a Statically encode bit 25 to indicate immediate form of data processing instructions. Patch by Sean Callanan. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74972 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-07 23:40:25 +00:00
Evan Cheng
36a0aebac2 Add bfc to armv6t2. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74868 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-06 22:23:46 +00:00
Bruno Cardoso Lopes
ac57e6e498 Add the Object Code Emitter class. Original patch by Aaron Gray, I did some 
cleanup, removed some #includes and moved Object Code Emitter out-of-line.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74813 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-06 05:09:34 +00:00
David Goodwin
c9a59b5960 Improve Thumb-2 jump table support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74549 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-30 19:50:22 +00:00
Anton Korobeynikov
d49ea77cbc Split thumb-related stuff into separate classes. 
Step 1: ARMInstructionInfo => {ARM,Thumb}InstructionInfo

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74329 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 21:28:53 +00:00
Evan Cheng
358dec5180 Part 1. 
- Change register allocation hint to a pair of unsigned integers. The hint type is zero (which means prefer the register specified as second part of the pair) or entirely target dependent.
- Allow targets to specify alternative register allocation orders based on allocation hint.

Part 2.
- Use the register allocation hint system to implement more aggressive load / store multiple formation.
- Aggressively form LDRD / STRD. These are formed *before* register allocation. It has to be done this way to shorten live interval of base and offset registers. e.g.
v1025 = LDR v1024, 0
v1026 = LDR v1024, 0
=>
v1025,v1026 = LDRD v1024, 0

If this transformation isn't done before allocation, v1024 will overlap v1025 which means it more difficult to allocate a register pair.

- Even with the register allocation hint, it may not be possible to get the desired allocation. In that case, the post-allocation load / store multiple pass must fix the ldrd / strd instructions. They can either become ldm / stm instructions or back to a pair of ldr / str instructions.

This is work in progress, not yet enabled.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73381 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-15 08:28:29 +00:00
Bruno Cardoso Lopes
434dd4fd94 Fix new CodeEmitter stuff to follow LLVM codying style. Patch by Aaron Gray 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72697 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-01 19:57:37 +00:00
Bruno Cardoso Lopes
a3f99f9033 First patch in the direction of splitting MachineCodeEmitter in two subclasses: 
JITCodeEmitter and ObjectCodeEmitter. No functional changes yet. Patch by Aaron Gray



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72631 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-30 20:51:52 +00:00
Evan Cheng
5788d1a169 Fix MachineCodeEmitter to use uintptr_t instead of intptr_t. This avoids some overflow issues. Patch by Thomas Jablin. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60828 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-10 02:32:19 +00:00
Evan Cheng
97c573d5de Fix a thinko. MO is getOperand(i-1) so we don't have to adjust e. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59696 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-20 02:25:51 +00:00
Evan Cheng
e3066abfcf Eliminate a compile time warning. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59678 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-19 23:21:33 +00:00
Evan Cheng
a956255ebf Fix MOVrx, MOVsrl_flag, and MOVsra_flag encodings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59314 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-14 20:09:11 +00:00
Evan Cheng
ffa6d962a7 Handle the rest of pseudo instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59275 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-13 23:36:57 +00:00
Evan Cheng
35b0bfd06d Don't forget to emit stubs for function GV's emitted in CONSTPOOL_ENTRY's. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59258 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-13 19:22:28 +00:00
Evan Cheng
67fd91f3df Missed a break statement. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59231 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-13 07:46:59 +00:00
Evan Cheng
148cad8b30 Fix pre- and post-indexed load / store encoding bugs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59230 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-13 07:34:59 +00:00
Evan Cheng
607f1b41a2 Address mode immediate offset has already been divided by 4. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59117 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-12 08:21:12 +00:00
Evan Cheng
3f4924efff Fix a VFP binary arithmetic instruction encoding bug. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59116 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-12 08:14:21 +00:00
Evan Cheng
706329143d Fix address mode 3 immediate offset mode encoding. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59109 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-12 07:34:37 +00:00
Evan Cheng
3c4a4ffa3d Consolidate formats; fix FCMPED etc. encodings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59107 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-12 07:18:38 +00:00
Evan Cheng
80a119842d Fix VFP conversion instruction encodings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59104 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-12 06:41:41 +00:00
Evan Cheng
d06d48d2b5 Fix encoding of single-precision VFP registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59102 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-12 02:19:38 +00:00
Evan Cheng
580c0dfaed VFP fld / fst immediate field is multiplied by 4. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59100 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-12 01:02:24 +00:00
Evan Cheng
0a0ab1387a Fix FMDRR encoding. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59088 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-11 22:46:12 +00:00
Evan Cheng
cb5201f3b2 Handle floating point constpool_entry's. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59087 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-11 22:19:31 +00:00
Evan Cheng
cd8e66a1ef Encode VFP load / store instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59084 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-11 21:48:44 +00:00
Evan Cheng
78be83d7c2 Encode VFP conversion instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59074 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-11 19:40:26 +00:00
Evan Cheng
96581d3633 Encode VFP arithmetic instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59016 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-11 02:11:05 +00:00
Evan Cheng
9ed2f80910 Rename isGVNonLazyPtr to isIndirectSym to reflect how it will be used. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58949 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-10 01:08:07 +00:00
Evan Cheng
3cc8223a3c Tell ARMJITInfo if codegen relocation is PIC. It changes how function stubs are generated. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58896 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-08 07:38:22 +00:00
Evan Cheng
103325179a Fix relocation for calls to external symbols. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58893 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-08 07:22:33 +00:00
Evan Cheng
05c356e65a Skip over two-address use operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58883 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-08 01:44:13 +00:00
Evan Cheng
e96a490d7a Handle ARM machine constantpool entry with non-lazy ptr. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58882 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-08 01:31:27 +00:00
Evan Cheng
413a89f318 More code clean up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58872 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-07 22:57:53 +00:00
Evan Cheng
437c1738ef Get PIC jump table working. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58869 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-07 22:30:53 +00:00
Evan Cheng
4df60f5491 Jump table JIT support. Work in progress. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58836 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-07 09:06:08 +00:00
Evan Cheng
8b59db3f2c Encode misc arithmetic instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58828 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-07 01:41:35 +00:00
Evan Cheng
97f48c39fd Encode extend instructions; more clean up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58818 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-06 22:15:19 +00:00
Evan Cheng
12c3a533c5 - Improve naming consistency: Branch -> BrFrm, BranchMisc -> BrMiscFrm. 
- Consolidate instruction formats.
- Other clean up.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58808 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-06 17:48:05 +00:00
Evan Cheng
d87293ce78 Remove opcode from instruction TS flags; add MOVCC support; fix addrmode3 encoding bug. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58800 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-06 08:47:38 +00:00
Evan Cheng
9092213a5e Fix so_imm encoding bug; add support for MOVi2pieces. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58790 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-06 02:25:39 +00:00
Evan Cheng
fbc9d412ef Fix encoding of multiple instructions with 3 src operands; also handle smmul, smmla, and smmls. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58789 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-06 01:21:28 +00:00
Evan Cheng
83b5cf0272 Encode pic load / store instructions; fix some encoding bugs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58780 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-05 23:22:34 +00:00