Dan Gohman
9a9d218ed0
Revert r131781 again. Apparently there is more going on here.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132625 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-04 05:11:22 +00:00
Jakob Stoklund Olesen
1de99829b6
Teach TableGen to evaluate DAG expressions as set operations.
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A TableGen backend can define how certain classes can be expanded into
ordered sets of defs, typically by evaluating a specific field in the
record. The SetTheory class can then evaluate DAG expressions that refer
to these named sets.
A number of standard set and list operations are predefined, and the
backend can add more specialized operators if needed. The -print-sets
backend is used by SetTheory.td to provide examples.
This is intended to simplify how register classes are defined:
def GR32_NOSP : RegisterClass<"X86", [i32], 32, (sub GR32, ESP)>;
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132621 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-04 04:11:37 +00:00
Dan Gohman
c122c625ce
Reapply r131781 (revert r131809), now that some BasicAA shortcomings
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it exposed are fixed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132611 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-04 00:46:31 +00:00
Dan Gohman
1fc18d71de
Fix BasicAA's recursion detection so that it doesn't pessimize
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queries in the case of a DAG, where a query reaches a node
visited earlier, but it's not on a cycle. This avoids
MayAlias results in cases where BasicAA is expected to
return MustAlias or PartialAlias in order to protect TBAA.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132609 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-04 00:31:50 +00:00
Stuart Hastings
865f09334f
Reapply 132424 with fixes. This fixes PR10068.
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rdar://problem/5993888
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132606 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-03 23:53:54 +00:00
Jakob Stoklund Olesen
2e3e720d76
Fix some tests that depend on register allocation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132602 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-03 22:45:21 +00:00
Eric Christopher
ec281c8934
Another possible bug. Stopgap until we can autogenerate tables and
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constraint lengths.
Part of rdar://9037836 and rdar://9119939
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132598 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-03 22:09:12 +00:00
Eric Christopher
ce8671c612
Testcase for llvm-gcc commit r132591.
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Part of rdar://9037836 and rdar://9119939
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132592 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-03 20:56:31 +00:00
Eric Christopher
ce1ecf59c8
Fix an off by one error.
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Part of rdar://9037836 and rdar://9119939
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132590 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-03 20:44:52 +00:00
Bill Wendling
c3526c778e
Remove testcase. It's problematic for the buildbots.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132589 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-03 20:43:58 +00:00
Jakob Stoklund Olesen
5f2316a3b5
Switch AllocationOrder to using RegisterClassInfo instead of a BitVector
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of reserved registers.
Use RegisterClassInfo in RABasic as well. This slightly changes som
allocation orders because RegisterClassInfo puts CSR aliases last.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132581 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-03 20:34:53 +00:00
Dan Gohman
965fefa1ad
When merging MustAlias and PartialAlias, chose PartialAlias instead
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of conservatively choosing MayAlias.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132579 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-03 20:17:36 +00:00
Bill Wendling
578229cada
Accomodate front-ends which use private instead of internal here.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132575 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-03 19:21:05 +00:00
Eric Christopher
cf714d44b8
Make the Uv constraint a memory operand. This doesn't solve the
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addressing mode problem mentioned in r132559.
Backend part of rdar://9037836 and part of rdar://9119939
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132561 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-03 17:24:37 +00:00
Roman Divacky
0c9b559bfd
Fix wrong usages of CTR/MCTR where CTR8/MCTR8 was meant.
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- Check for MTCTR8 in addition to MTCTR when looking up a hazard.
- When lowering an indirect call use CTR8 when targeting 64bit.
- Introduce BCTR8 that uses CTR8 and use it on 64bit when expanding ISD::BRIND.
The last change fixes PR8487. With those changes, we are able to compile a
running "ls" and "sh" on FreeBSD/PowerPC64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132552 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-03 15:47:49 +00:00
Nick Lewycky
444f297a78
Bail on unswitching a switch statement for a case with a critical edge. We name
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which edge to split by pred/succ pair, which means that we can end up splitting
the wrong edge (by case value) in the switch statement entirely. Fixes PR10031!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132535 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-03 06:27:15 +00:00
Eli Friedman
d6412c940e
Add ARM fast-isel support for materializing the address of a global in cases where the global uses an indirect symbol.
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rdar://9431157
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132522 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-03 01:13:19 +00:00
Andrew Trick
98c521ceba
Test case pasto (failed when run with IR verifier).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132516 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-02 23:57:27 +00:00
Bill Wendling
76dd0de6d5
This should have been a C++ testcase.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132504 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-02 22:26:15 +00:00
Bill Wendling
effc34ec59
Testcase for r132493.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132495 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-02 22:12:42 +00:00
Bill Wendling
7a6037c4e0
Update for r132493 change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132494 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-02 22:11:49 +00:00
Eli Friedman
70d893e84b
PR10067: Add missing safety check to call return transformation in MemCpyOpt::processStore. If something accesses the dest of the "copy" between the call and the copy, the performCallSlotOptzn transformation is not valid.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132485 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-02 21:24:42 +00:00
Devang Patel
cf4cc84738
During post RA scheduling, do not try to chase reg defs. to preserve DBG_VALUEs. This approach has several downsides, for example, it does not work when dbg value is a constant integer, it does not work if reg is defined more than once, it places end of debug value range markers in the wrong place. It even causes misleading incorrect debug info when duplicate DBG_VALUE instructions point to same reg def.
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Instead, use simpler approach and let DBG_VALUE follow its predecessor instruction. After live debug value analysis pass, all DBG_VALUE instruction are placed at the right place. Thanks Jakob for the hint!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132483 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-02 20:07:12 +00:00
Rafael Espindola
580cbd9cf0
Add test for PR10068.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132482 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-02 20:02:48 +00:00
Rafael Espindola
251b4a0405
Revert 132424 to fix PR10068.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132479 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-02 19:57:47 +00:00
Stuart Hastings
552c0ee4f9
Andy pointed out a dumb omission in this test case. Thanks Andy!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132477 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-02 19:26:49 +00:00
Stuart Hastings
1f344f052e
Jakob pointed out a dumb omission in this test case. Thanks Jakob!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132472 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-02 18:44:05 +00:00
Stuart Hastings
84be958ed8
Omit unnecessary stack copy when x87 input is a load.
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rdar://problem/6373334
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132458 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-02 15:57:11 +00:00
Stuart Hastings
ac92565384
Tweak testcase for ARM bot. rdar://problem/5993888
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132454 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-02 05:05:39 +00:00
Akira Hatanaka
5e06903e66
Detect FI|cst pattern in MipsDAGToDAGISel::SelectAddr. Patch by Sasa Stankovic.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132448 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-02 01:03:14 +00:00
Akira Hatanaka
f876bf81df
Test case for r132444.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132445 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-02 00:25:53 +00:00
Eli Friedman
7c6a5a2c39
When marking a block as being unanalyzable, use "Clobber" on the terminator instead of the first instruction in the block. This is a bit of a hack; "Clobber" isn't really the right marking in the first place. memdep doesn't really have any way of properly expressing "unanalyzable" at the moment. Using it on the terminator is much less ambiguous than using it on an arbitrary instruction, though.
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In the given testcase, the "Clobber" was pointing to a load, and GVN was incorrectly assuming that meant that the "Clobber" load overlapped the load being analyzed (when they are actually unrelated).
The included testcase tests both this commit and r132434.
Part two of rdar://9429882. (r132434 was mislabeled.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132442 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-02 00:08:52 +00:00
Devang Patel
c432907eca
Do not drop constant values when a variable's content is described using .debug_loc entries.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132427 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-01 22:03:25 +00:00
Stuart Hastings
ec880283b3
Recommit 132404 with fixes. rdar://problem/5993888
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132424 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-01 21:33:14 +00:00
Eric Christopher
9aaa02a1d2
Allow bitcasts between valid types of the same size and vector
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types if the vector type is legal.
Fixes rdar://9306086
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132420 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-01 19:55:10 +00:00
Stuart Hastings
4abc5fea9c
Revert 132404 to appease a buildbot. rdar://problem/5993888
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132419 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-01 19:52:20 +00:00
Eric Christopher
a3d91cd6a6
Add a testcase, enabled only on arm, for llvm-gcc r132366.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132409 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-01 18:23:56 +00:00
Stuart Hastings
0f971b1fdb
Cleanup test case. rdar://problem/5660695
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132408 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-01 18:23:14 +00:00
Stuart Hastings
10ff0bbdfb
Add support for x86 CMPEQSS and friends. These instructions do a
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floating-point comparison, generate a mask of 0s or 1s, and generally
DTRT with NaNs. Only profitable when the user wants a materialized 0
or 1 at runtime. rdar://problem/5993888
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132404 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-01 17:17:45 +00:00
Stuart Hastings
f1002828fd
Reapply 132348 with fixes. rdar://problem/6501862
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132402 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-01 16:42:47 +00:00
Stuart Hastings
d7de954644
A forthcoming SSE patch will break this test; since the test is also
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valid for x87, re-target to x87. rdar://problem/5993888
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132401 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-01 16:13:09 +00:00
Stuart Hastings
b909d35de4
Test case for 132396. rdar://problem/5660695
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132399 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-01 15:50:29 +00:00
Nadav Rotem
b6fbec3a54
This patch is another step in the direction of adding vector select. In this
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patch we add a flag to enable a new type legalization decision - to promote
integer elements in vectors. Currently, the rest of the codegen does not support
this kind of legalization. This flag will be removed when the transition is
complete.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132394 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-01 12:51:46 +00:00
John McCall
1edbd6f3f0
First, do no harm -- even if we can't find a selector for an enclosing
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landing pad, forward llvm.eh.resume calls to it instead of turning them
invalidly into invokes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132382 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-01 02:17:11 +00:00
Galina Kistanova
a9f907912c
Reverted r132135 per Xerxes request. These tests are passing for his setup. Requires more research.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132364 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-31 21:50:33 +00:00
Andrew Trick
b1ce4c09dd
scev: Better sign-extend removal. Normalize postincrement recurrences
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so that their sign extended forms are congruent when no overflow occurs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132360 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-31 21:17:47 +00:00
Stuart Hastings
3200c4b53c
Revert to pacify a buildbot. rdar://problem/6501862
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132351 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-31 19:56:35 +00:00
Stuart Hastings
df48e84b5b
Followup to 132316; accept arbitrary constants, add with a constant,
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sub with a non-constant. Fix comments, enlarge test case.
rdar://problem/6501862
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132348 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-31 19:29:55 +00:00
Richard Osborne
9497466190
Add XCore intrinsic for crc8.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132340 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-31 16:24:49 +00:00
Richard Osborne
7736c37c14
Add XCore intrinsic for crc32.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132336 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-31 14:47:36 +00:00