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Commit Graph

Author	SHA1	Message	Date
Owen Anderson	8d7d2e1238	Replace the existing ARM disassembler with a new one based on the FixedLenDecoderEmitter. This new disassembler can correctly decode all the testcases that the old one did, though some "expected failure" testcases are XFAIL'd for now because it is not (yet) as strict in operand checking as the old one was. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137144 91177308-0d34-0410-b5e6-96231b3b80d8	2011-08-09 20:55:18 +00:00
Johnny Chen	b26d8d7c49	Check for invalid register encodings for UMAAL and friends where: if dLo == 15 \|\| dHi == 15 \|\| n == 15 \|\| m == 15 then UNPREDICTABLE; if dHi == dLo then UNPREDICTABLE; rdar://problem/9230202 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128895 91177308-0d34-0410-b5e6-96231b3b80d8	2011-04-05 17:43:10 +00:00

Author

SHA1

Message

Date

Owen Anderson

8d7d2e1238

Replace the existing ARM disassembler with a new one based on the FixedLenDecoderEmitter.

This new disassembler can correctly decode all the testcases that the old one did, though
some "expected failure" testcases are XFAIL'd for now because it is not (yet) as strict in
operand checking as the old one was.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137144 91177308-0d34-0410-b5e6-96231b3b80d8

2011-08-09 20:55:18 +00:00

Johnny Chen

b26d8d7c49

Check for invalid register encodings for UMAAL and friends where:

if dLo == 15 || dHi == 15 || n == 15 || m == 15 then UNPREDICTABLE;
    if dHi == dLo then UNPREDICTABLE;

rdar://problem/9230202


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128895 91177308-0d34-0410-b5e6-96231b3b80d8

2011-04-05 17:43:10 +00:00

2 Commits