Evan Cheng
134982daa9
More accurate estimate / tracking of register pressure.
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- Initial register pressure in the loop should be all the live defs into the
loop. Not just those from loop preheader which is often empty.
- When an instruction is hoisted, update register pressure from loop preheader
to the original BB.
- Treat only use of a virtual register as kill since the code is still SSA.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116956 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-20 22:03:58 +00:00
Rafael Espindola
1e81966626
Remove arm_apcscc from the test files. It is the default and doing this
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matches what llvm-gcc and clang now produce.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106221 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-17 15:18:27 +00:00
Evan Cheng
30fdb5c2ac
- Clean up some crappy code which deals with coalescing of copies which look at
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extract_subreg / insert_subreg, etc.
- Add support for more aggressive insert_subreg coalescing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101971 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-21 00:44:22 +00:00
Jakob Stoklund Olesen
4a540f0593
Reapply coalescer fix for better cross-class coalescing.
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This time with fixed test cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95938 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-11 23:55:29 +00:00
Jim Grosbach
77b02beb1f
move fconst[sd] to UAL. <rdar://7414913>
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89700 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-23 21:08:25 +00:00
Evan Cheng
4aedb61d03
Remat VLDRD from constpool. Clean up some instruction property specifications.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89478 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 19:57:15 +00:00
Jim Grosbach
e5165490b7
Use Unified Assembly Syntax for the ARM backend.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86494 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-09 00:11:35 +00:00
Evan Cheng
ba908640b3
Fix PR5367. QPR_8 is the super regclass of DPR_8 and SPR_8.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85871 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-03 05:52:54 +00:00
Anton Korobeynikov
7b360e7f29
Temporary xfail until PR5367 will be resolved
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85848 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-03 00:37:36 +00:00
Jim Grosbach
8cd0a8cb82
vml[as].f32 cause stalls in following advanced SIMD instructions. Avoid using
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them for scalar floating point operations for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85697 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-31 22:57:36 +00:00
Evan Cheng
21a45557c6
Add a couple of ARM cross-rc coalescing tests.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85051 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-25 08:01:41 +00:00
