56654 Commits

Author SHA1 Message Date
Roman Divacky
5236ab3fdd Specify MachinePointerInfo as refering to the argument value and offset of the
store when handling byval arguments. Thus preventing reordering of the store
with load with post-RA scheduler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164553 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-24 20:47:19 +00:00
Chad Rosier
00796a1b15 Rather then have a wrapper function, have tblgen instantiate the implementation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164548 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-24 19:32:29 +00:00
Richard Osborne
bdc76fc75a Add missing check for presence of target data.
This avoids a crash in visitAllocaInst when target data isn't available.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164539 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-24 17:10:03 +00:00
Chandler Carruth
84d882ee56 Enable the new SROA pass by default.
Queue the fallout. ;]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164480 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-24 01:10:25 +00:00
Chandler Carruth
bc4021f31e Address one of the original FIXMEs for the new SROA pass by implementing
integer promotion analogous to vector promotion. When there is an
integer alloca being accessed both as its integer type and as a narrower
integer type, promote the narrower access to "insert" and "extract" the
smaller integer from the larger one, and make the integer alloca
a candidate for promotion.

In the new formulation, we don't care about target legal integer or use
thresholds to control things. Instead, we only perform this promotion to
an integer type which the frontend has already emitted a load or store
for. This bounds the scope and prevents optimization passes from
coalescing larger and larger entities into a single integer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164479 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-24 00:34:20 +00:00
Anton Korobeynikov
371e17c03c Emit dtors into proper section while compiling in vcpp-compatible mode.
Patch by Kai!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164476 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-23 15:53:47 +00:00
Chandler Carruth
02e92a0b5d Switch to a signed representation for the dynamic offsets while walking
across the uses of the alloca. It's entirely possible for negative
numbers to come up here, and in some rare cases simply doing the 2's
complement arithmetic isn't the correct decision. Notably, we can't zext
the index of the GEP. The definition of GEP is that these offsets are
sign extended or truncated to the size of the pointer, and then wrapping
2's complement arithmetic used.

This patch fixes an issue that comes up with *no* input from the
buildbots or bootstrap afaict. The only place where it manifested,
disturbingly, is Clang's own regression test suite. A reduced and
targeted collection of tests are added to cope with this. Note that I've
tried to pin down the potential cases of overflow, but may have missed
some cases. I've tried to add a few cases to test this, but its hard
because LLVM has quite limited support for >64bit constructs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164475 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-23 11:43:14 +00:00
Nick Lewycky
85aa4f6eee Don't do actual work inside an assert statement. Fixes PR11760!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164474 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-23 03:58:21 +00:00
Craig Topper
a96a182474 Add LLVM_OVERRIDE to methods that override their base classes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164471 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-23 02:12:10 +00:00
NAKAMURA Takumi
d15e2a0857 ARMInstPrinter.cpp: Fix a warning in -Asserts. [-Wunused-variable]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164459 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-22 13:12:28 +00:00
NAKAMURA Takumi
2d67eac2e6 Whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164458 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-22 13:12:22 +00:00
Tim Northover
bb5174246b Fix edge cases of ARM shift operands in arith instructions.
As before with load instructions, oddities like "asr #32", "rrx" could
be printed incorrectly.

Patch by Chris Lidbury.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164456 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-22 11:18:19 +00:00
Tim Northover
93c7c449a1 Fix the handling of edge cases in ARM shifted operands.
This patch fixes load/store instructions to handle less common cases
like "asr #32", "rrx" properly throughout the MC layer.

Patch by Chris Lidbury.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164455 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-22 11:18:12 +00:00
Michael Liao
23bd47c2d6 Fix 16-bit atomic inst encoding and keep pseudo-inst starting with '#'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164453 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-22 05:41:15 +00:00
Michael Liao
730b9dd2ce Fix typo in r164357
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164452 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-22 03:39:42 +00:00
Akira Hatanaka
ef5fc952e8 MIPS DSP: Add immediate leaves.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164435 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-22 00:07:12 +00:00
Akira Hatanaka
67032b27cd MIPS DSP: Add predicates and instruction template.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164434 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-22 00:06:06 +00:00
Akira Hatanaka
b430cecc0e Add MIPS DSP register classes. Set actions of DSP vector operations and override
TargetLowering's callback functions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164431 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21 23:58:31 +00:00
Akira Hatanaka
6fad5e742d SelectionDAG node enums for MIPS DSP nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164430 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21 23:52:47 +00:00
Akira Hatanaka
1024f290d1 Add MIPS accumulator and DSP control registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164429 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21 23:48:37 +00:00
Akira Hatanaka
a9adbf6df7 Add flags and feature bits for mips dsp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164428 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21 23:41:49 +00:00
Chandler Carruth
d54a6b56a9 Fix a case where the new SROA pass failed to zap dead operands to
selects with a constant condition. This resulted in the operands
remaining live through the SROA rewriter. Most of the time, this just
caused some dead allocas to persist and get zapped by later passes, but
in one case found by Joerg, it caused a crash when we tried to *promote*
the alloca despite it having this dead use. We already have the
mechanisms in place to handle this, just wire select up to them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164427 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21 23:36:40 +00:00
Eric Christopher
c69bdadac9 Add an --enable-backtraces option to configure to determine
whether or not we want to print out backtrace information. Useful
for libraries that don't need backtrace information on a crash.

rdar://11844710

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164426 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21 23:03:29 +00:00
Chad Rosier
d717a066c6 [ms-inline asm] Expose the mnemonicIsValid() function in the AsmParser.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164420 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21 22:21:26 +00:00
Eric Christopher
7b451cf356 Have the DbgVariable "isArtificial" and "isObjectPointer" not
care about it being an argument variable so that we can decide
that captured block and lambda vars that don't happen to
be arguments could be an argument pointer.

Add the object pointer for one case onto the subprogram die.

rdar://12001329

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164419 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21 22:18:52 +00:00
Chad Rosier
7d4e989da9 Add comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164415 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21 21:08:46 +00:00
Chad Rosier
4a6203a31b Add comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164414 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21 20:51:43 +00:00
Evan Cheng
bb36a43872 Fix a significant recent(?) regression. StackSlotColoring no longer did anything
because LiveStackAnalysis was not preserved by VirtRegWriter. This caused
big stack usage regression in some cases.

rdar://12340383


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164408 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21 20:04:28 +00:00
Benjamin Kramer
28aff84ceb LoopIdiom: Give up when the loop is not in canonical form.
We rely on it when doing the transforms. This can happen when there is an
indirectbr in  the loop.

Fixes PR13892.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164383 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21 17:27:23 +00:00
Chad Rosier
e5e674ba11 [fast-isel] Fallback to SelectionDAG isel if we require strict alignment for
non-aligned i32 loads/stores.
rdar://12304911

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164381 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21 16:58:35 +00:00
Benjamin Kramer
e5bd3cf000 InstCombine: Make sure we use the pre-zext type when creating a constant of a value that is zext'd.
Fixes PR13250.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164377 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21 16:26:41 +00:00
Bill Wendling
30b483c940 Encapsulate the "construct*AlignmentFromInt" functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164373 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21 16:07:28 +00:00
Michael Liao
ba4388656c Fix a typo in r164357
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164372 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21 16:03:03 +00:00
Bill Wendling
ef99fe8efa Make the 'get*AlignmentFromAttr' functions into member functions within the Attributes class. Now with fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164370 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21 15:26:31 +00:00
Benjamin Kramer
122f5e5a5b BitcodeReader: Correctly insert blockaddress constant referring to a already parsed function.
We inserted a placeholder that was never replaced because the function was
already visited. Assert that all placeholders have been resolved when tearing
down the bitcode reader.

Fixes PR13895.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164369 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21 14:34:31 +00:00
Andrew Trick
2f1d5d44c0 Cortex-A9 latency fixes (w/ -schedmodel only).
Quick review against the manual revealed a few obvious mistakes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164361 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21 05:06:40 +00:00
Michael Liao
fe87c302aa Add missing i8 max/min/umax/umin support
- Fix PR5145 and turn on test 8-bit atomic ops



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164358 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21 03:18:52 +00:00
Michael Liao
0838249a6a Revise td of X86 atomic instructions
- Rewirte most atomic instructions in templates for both better
  maintenance and future extensions, such as HLE in TSX.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164357 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21 03:00:17 +00:00
NAKAMURA Takumi
b377635592 Mips16FrameLowering.cpp: Remove unused TII introduced in r164349. [-Wunused-variable]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164354 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21 02:21:30 +00:00
Akira Hatanaka
0fdf3b029b Properly save and restore RA and Mips16 callee save registers S0,S1
Patch by Reed Kotler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164349 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21 01:08:16 +00:00
Chad Rosier
d70c98e884 [fast-isel] Fallback to SelectionDAG isel if we require strict alignment for
non-halfword-aligned i16 loads/stores.
rdar://12304911

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164345 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21 00:41:42 +00:00
Jim Grosbach
d314ab525d Tidy up. Whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164344 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21 00:36:42 +00:00
Jim Grosbach
1f9f599e70 Tidy up. Formatting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164343 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21 00:26:53 +00:00
Jim Grosbach
ced674e470 ARM: Use a dedicated intrinsic for vector bitwise select.
The expression based expansion too often results in IR level optimizations
splitting the intermediate values into separate basic blocks, preventing
the formation of the VBSL instruction as the code author intended. In
particular, LICM would often hoist part of the computation out of a loop.

rdar://11011471

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164340 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21 00:18:20 +00:00
Jakob Stoklund Olesen
e6e2d8cd90 Ignore PHI-defs for -new-coalescer interference checks.
A PHI can't create interference on its own. If two live ranges interfere
at a PHI, they must also interfere when leaving one of the PHI
predecessors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164330 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-20 23:08:42 +00:00
Jakob Stoklund Olesen
2df8ac84ae Extend -new-coalescer SSA update to handle mapped values as well.
The old-fashioned many-to-one value mapping doesn't always work when
merging vector lanes. A value can map to multiple different values, and
it can even be necessary to insert new PHIs.

When a value number is defined by a copy from a value number that
required SSa update, include the live range of the copied value number
in the SSA update as well. It is not necessarily a copy of the original
value number any longer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164329 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-20 23:08:39 +00:00
Eric Christopher
d57ae39a88 Only emit DW_AT_object_pointer if this is a definition.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164326 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-20 22:51:57 +00:00
Manman Ren
554da1a222 SimplifyCFG: sink common codes from IF, ELSE blocks down to END block.
We already have HoistThenElseCodeToIf, this patch implements
SinkThenElseCodeToEnd. When END block has only two predecessors and each
predecessor terminates with unconditional branches, we compare instructions in
IF and ELSE blocks backwards and check whether we can sink the common
instructions down.

rdar://12191395


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164325 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-20 22:37:36 +00:00
Bill Wendling
4aa189909a Revert r164308 to fix buildbots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164309 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-20 16:59:57 +00:00
Bill Wendling
f2e89e00b4 Make the 'get*AlignmentFromAttr' functions into member functions within the Attributes class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164308 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-20 16:27:05 +00:00