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213 Commits

Author SHA1 Message Date
Chris Lattner
3d3067bf6b The big change here is to handle printing/emission of X86II::MRMSrcMem 
instructions.  Right now the only users are load instructions, and Misha's
spill code


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4812 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-21 20:44:15 +00:00
Chris Lattner
675dd2cc47 Add printing support for /0 /1 type instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4803 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-21 17:09:01 +00:00
Chris Lattner
77875d88d0 Support Registers of the form (B8+ rd) for example 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4798 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-21 02:00:20 +00:00
Chris Lattner
233ad71051 Implement printing more, implement opcode output more 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4796 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-21 01:33:44 +00:00
Chris Lattner
644e1abae4 Print another class of instructions correctly, giving us: xorl EDX, EDX 
for example.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4793 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-21 00:30:01 +00:00
Misha Brukman
e1f0d8113a Check not only for MO_VirtualRegister, but MO_MachineRegister as well when 
printing out assembly. After all, we want the real thing too.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4783 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-20 18:56:41 +00:00
Chris Lattner
f9f6088e17 Start trying to print instructions more correctly. For now we also print out the opcode for each instruction as well. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4743 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-18 06:56:51 +00:00
Chris Lattner
927dd095c4 Arrange to have a TargetMachine available in X86InstrInfo::print 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4734 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-17 23:20:37 +00:00
Chris Lattner
dbb61c6445 Reorganize printing interface a bit 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4728 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-17 22:53:13 +00:00
Brian Gaeke
6559bb96a9 include/llvm/CodeGen/MachineInstrBuilder.h: Add addClobber() inline 
convenience method.  Fix typo in comment.
lib/Target/X86/InstSelectSimple.cpp: Explicitly specify some implicit uses.
 Use MOVZX/MOVSX instead of MOV instructions with sign extend instructions.
 Take out LEAVE instructions.
 32-bit IDIV and DIV use CDQ, not CWQ (CWQ is a typo).
 Fix typo in comment and remove some FIXME comments.
lib/Target/X86/Printer.cpp: Include X86InstrInfo.h and llvm/Function.h.
 Add some simple code to Printer::runOnFunction to iterate over
  MachineBasicBlocks and call X86InstrInfo::print().
lib/Target/X86/X86InstrInfo.def: Make some more instructions with
 implicit defs "Void".  Add more sign/zero extending "move" insns
 (movsx, movzx).
lib/Target/X86/X86RegisterInfo.def: Add EFLAGS as a register.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4707 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-14 22:32:30 +00:00
Chris Lattner
b4f68ed32e Convert backend to use passes, implement X86TargetMachine 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4421 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-10-29 22:37:54 +00:00
Chris Lattner
75276f150e Initial stab at MachineInstr'ication 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4367 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-10-28 23:55:19 +00:00
Chris Lattner
726140821f Initial checkin of X86 backend. 
We can instruction select exactly one instruction 'ret void'.  Wow.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4284 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-10-25 22:55:53 +00:00