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Commit Graph

878 Commits

Author SHA1 Message Date
Rafael Espindola
9a58023c6c Refactor TLS code and add some tests. The tests and expected results are: 
pic |  declaration | linkage  | visibility |

!pic |  declaration | external | default    | tls1.ll     tls2.ll     | local exec
 pic |  declaration | external | default    | tls1-pic.ll tls2-pic.ll | general dynamic
!pic | !declaration | external | default    | tls3.ll     tls4.ll     | initial exec
 pic | !declaration | external | default    | tls3-pic.ll tls4-pic.ll | general dynamic

!pic |  declaration | external | hidden     | tls7.ll     tls8.ll     | local exec
 pic |  declaration | external | hidden     | X                       | local dynamic
!pic | !declaration | external | hidden     | tls9.ll     tls10.ll    | local exec
 pic | !declaration | external | hidden     | X                       | local dynamic

!pic |  declaration | internal | default    | tls5.ll     tls6.ll     | local exec
 pic |  declaration | internal | default    | X                       | local dynamic

The ones marked with an X have not been implemented since local dynamic is not implemented.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65632 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-27 13:37:18 +00:00
Evan Cheng
a87008d90b Revert BuildVectorSDNode related patches: 65426, 65427, and 65296. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65482 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-25 22:49:59 +00:00
Evan Cheng
242b38bae5 Only v1i16 (i.e. _m64) is returned via RAX / RDX. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65313 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-23 09:03:22 +00:00
Nate Begeman
b9a47b824f Generate better code for v8i16 shuffles on SSE2 
Generate better code for v16i8 shuffles on SSE2 (avoids stack)
Generate pshufb for v8i16 and v16i8 shuffles on SSSE3 where it is fewer uops.
Document the shuffle matching logic and add some FIXMEs for later further
  cleanups.
New tests that test the above.

Examples:

New:
_shuf2:
	pextrw	$7, %xmm0, %eax
	punpcklqdq	%xmm1, %xmm0
	pshuflw	$128, %xmm0, %xmm0
	pinsrw	$2, %eax, %xmm0

Old:
_shuf2:
	pextrw	$2, %xmm0, %eax
	pextrw	$7, %xmm0, %ecx
	pinsrw	$2, %ecx, %xmm0
	pinsrw	$3, %eax, %xmm0
	movd	%xmm1, %eax
	pinsrw	$4, %eax, %xmm0
	ret

=========

New:
_shuf4:
	punpcklqdq	%xmm1, %xmm0
	pshufb	LCPI1_0, %xmm0

Old:
_shuf4:
	pextrw	$3, %xmm0, %eax
	movsd	%xmm1, %xmm0
	pextrw	$3, %xmm1, %ecx
	pinsrw	$4, %ecx, %xmm0
	pinsrw	$5, %eax, %xmm0

========

New:
_shuf1:
	pushl	%ebx
	pushl	%edi
	pushl	%esi
	pextrw	$1, %xmm0, %eax
	rolw	$8, %ax
	movd	%xmm0, %ecx
	rolw	$8, %cx
	pextrw	$5, %xmm0, %edx
	pextrw	$4, %xmm0, %esi
	pextrw	$3, %xmm0, %edi
	pextrw	$2, %xmm0, %ebx
	movaps	%xmm0, %xmm1
	pinsrw	$0, %ecx, %xmm1
	pinsrw	$1, %eax, %xmm1
	rolw	$8, %bx
	pinsrw	$2, %ebx, %xmm1
	rolw	$8, %di
	pinsrw	$3, %edi, %xmm1
	rolw	$8, %si
	pinsrw	$4, %esi, %xmm1
	rolw	$8, %dx
	pinsrw	$5, %edx, %xmm1
	pextrw	$7, %xmm0, %eax
	rolw	$8, %ax
	movaps	%xmm1, %xmm0
	pinsrw	$7, %eax, %xmm0
	popl	%esi
	popl	%edi
	popl	%ebx
	ret

Old:
_shuf1:
	subl	$252, %esp
	movaps	%xmm0, (%esp)
	movaps	%xmm0, 16(%esp)
	movaps	%xmm0, 32(%esp)
	movaps	%xmm0, 48(%esp)
	movaps	%xmm0, 64(%esp)
	movaps	%xmm0, 80(%esp)
	movaps	%xmm0, 96(%esp)
	movaps	%xmm0, 224(%esp)
	movaps	%xmm0, 208(%esp)
	movaps	%xmm0, 192(%esp)
	movaps	%xmm0, 176(%esp)
	movaps	%xmm0, 160(%esp)
	movaps	%xmm0, 144(%esp)
	movaps	%xmm0, 128(%esp)
	movaps	%xmm0, 112(%esp)
	movzbl	14(%esp), %eax
	movd	%eax, %xmm1
	movzbl	22(%esp), %eax
	movd	%eax, %xmm2
	punpcklbw	%xmm1, %xmm2
	movzbl	42(%esp), %eax
	movd	%eax, %xmm1
	movzbl	50(%esp), %eax
	movd	%eax, %xmm3
	punpcklbw	%xmm1, %xmm3
	punpcklbw	%xmm2, %xmm3
	movzbl	77(%esp), %eax
	movd	%eax, %xmm1
	movzbl	84(%esp), %eax
	movd	%eax, %xmm2
	punpcklbw	%xmm1, %xmm2
	movzbl	104(%esp), %eax
	movd	%eax, %xmm1
	punpcklbw	%xmm1, %xmm0
	punpcklbw	%xmm2, %xmm0
	movaps	%xmm0, %xmm1
	punpcklbw	%xmm3, %xmm1
	movzbl	127(%esp), %eax
	movd	%eax, %xmm0
	movzbl	135(%esp), %eax
	movd	%eax, %xmm2
	punpcklbw	%xmm0, %xmm2
	movzbl	155(%esp), %eax
	movd	%eax, %xmm0
	movzbl	163(%esp), %eax
	movd	%eax, %xmm3
	punpcklbw	%xmm0, %xmm3
	punpcklbw	%xmm2, %xmm3
	movzbl	188(%esp), %eax
	movd	%eax, %xmm0
	movzbl	197(%esp), %eax
	movd	%eax, %xmm2
	punpcklbw	%xmm0, %xmm2
	movzbl	217(%esp), %eax
	movd	%eax, %xmm4
	movzbl	225(%esp), %eax
	movd	%eax, %xmm0
	punpcklbw	%xmm4, %xmm0
	punpcklbw	%xmm2, %xmm0
	punpcklbw	%xmm3, %xmm0
	punpcklbw	%xmm1, %xmm0
	addl	$252, %esp
	ret



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65311 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-23 08:49:38 +00:00
Scott Michel
4214a5531c Introduce the BuildVectorSDNode class that encapsulates the ISD::BUILD_VECTOR 
instruction. The class also consolidates the code for detecting constant
splats that's shared across PowerPC and the CellSPU backends (and might be
useful for other backends.) Also introduces SelectionDAG::getBUID_VECTOR() for
generating new BUILD_VECTOR nodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65296 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-22 23:36:09 +00:00
Evan Cheng
6140a8b057 Be bug compatible with gcc by returning MMX values in RAX. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65274 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-22 08:05:12 +00:00
Evan Cheng
79fb3b434f Support return of MMX values in 64-bit mode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65152 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-20 20:43:02 +00:00
Scott Michel
fdc40a0a69 Remove trailing whitespace to reduce later commit patch noise. 
(Note: Eventually, commits like this will be handled via a pre-commit hook that
 does this automagically, as well as expand tabs to spaces and look for 80-col
 violations.)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64827 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-17 22:15:04 +00:00
Evan Cheng
c7ce29b04f Teach x86 target -soft-float. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64496 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-13 22:36:38 +00:00
Dale Johannesen
78e3e521cd Arrange to print constants that match "n" and "i" constraints 
in inline asm as signed (what gcc does).  Add partial support
for x86-specific "e" and "Z" constraints, with appropriate
signedness for printing.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64400 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-12 20:58:09 +00:00
Dale Johannesen
6f38cb61a9 Use getDebugLoc forwarder instead of getNode()->getDebugLoc. 
No functional change.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64026 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-07 19:59:05 +00:00
Dan Gohman
1fdbc1dd4e Constify TargetInstrInfo::EmitInstrWithCustomInserter, allowing 
ScheduleDAG's TLI member to use const.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64018 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-07 16:15:20 +00:00
Dale Johannesen
b300d2aa3e Get rid of the last non-DebugLoc versions of getNode! 
Many targets build placeholder nodes for special operands, e.g.
GlobalBaseReg on X86 and PPC for the PIC base.  There's no
sensible way to associate debug info with these.  I've left
them built with getNode calls with explicit DebugLoc::getUnknownLoc operands. 
I'm not too happy about this but don't see a good improvement;
I considered adding a getPseudoOperand or something, but it
seems to me that'll just make it harder to read.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63992 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-07 00:55:49 +00:00
Dale Johannesen
e8d7230f48 Remove more non-DebugLoc getNode variants. Use 
getCALLSEQ_{END,START} to permit passing no DebugLoc
there.  UNDEF doesn't logically have DebugLoc; add
getUNDEF to encapsulate this.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63978 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-06 23:05:02 +00:00
Dale Johannesen
de06470330 Remove more non-DebugLoc versions of getNode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63969 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-06 21:50:26 +00:00
Dale Johannesen
ed2eee63a6 Get rid of one more non-DebugLoc getNode and 
its corresponding getTargetNode.  Lots of
caller changes.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63904 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-06 01:31:28 +00:00
Dale Johannesen
33c960f523 Remove non-DebugLoc versions of getLoad and getStore. 
Adjust the many callers of those versions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63767 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-04 20:06:27 +00:00
Dan Gohman
37eed798a9 Minor code cleanups; no functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63740 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-04 17:28:58 +00:00
Mon P Wang
7bcaefaf59 Fixes a case where we generate an incorrect mask for pshfhw in the presence 
of undefs and incorrectly determining if we have punpckldq.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63702 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-04 01:16:59 +00:00
Dale Johannesen
dd64c417c0 Patch up omissions in DebugLoc propagation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63693 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-04 00:33:20 +00:00
Dale Johannesen
0f502f6f44 Add some DL propagation to places that didn't 
have it yet.  More coming.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63673 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-03 22:26:09 +00:00
Dale Johannesen
e4d209dcb8 DebugLoc propagation. done with file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63656 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-03 20:21:25 +00:00
Dale Johannesen
ace1610df5 DebugLoc propagation. 2/3 through file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63650 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-03 19:33:06 +00:00
Evan Cheng
97d0e0e314 ADD / SUB / SMUL / UMUL with overflow second result top bits must be zero. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63509 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-02 09:15:04 +00:00
Evan Cheng
961d6d4ac0 Add comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63506 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-02 08:19:07 +00:00
Evan Cheng
67ad9db15b Teach LowerBRCOND to recognize (xor (setcc x), 1). The xor inverts the condition. It's normally transformed by the dag combiner, unless the condition is set by a arithmetic op with overflow. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63505 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-02 08:07:36 +00:00
Torok Edwin
3f142c36ad Implement -mno-sse: if SSE is disabled on x86-64, don't store XMM on stack for 
var-args, and don't allow FP return values


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63495 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-01 18:15:56 +00:00
Duncan Sands
b0d5cdd52e Fix PR3453 and probably a bunch of other potential 
crashes or wrong code with codegen of large integers:
eliminate the legacy getIntegerVTBitMask and
getIntegerVTSignBit methods, which returned their
value as a uint64_t, so couldn't handle huge types.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63494 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-01 18:06:53 +00:00
Dale Johannesen
7d2ad624fa Make LowerCallTo and LowerArguments take a DebugLoc 
argument.  Adjust all callers and overloaded versions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63444 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-30 23:10:59 +00:00
Bill Wendling
7581bfa275 Get rid of the non-DebugLoc-ified getNOT() method. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63442 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-30 23:03:19 +00:00
Mon P Wang
7ad9b51278 When PerformBuildVectorCombine, avoid creating a X86ISD::VZEXT_LOAD of 
an illegal type.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63380 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-30 07:07:40 +00:00
Dan Gohman
e5af2d3a22 Make x86's BT instruction matching more thorough, and add some 
dagcombines that help it match in several more cases. Add
several more cases to test/CodeGen/X86/bt.ll. This doesn't
yet include matching for BT with an immediate operand, it
just covers more register+register cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63266 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-29 01:59:02 +00:00
Mon P Wang
e91a000889 Fixed lowering of v816 shuffles. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63252 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-28 23:11:14 +00:00
Mon P Wang
3becd093cc Add shuffle splat pattern for x86 sse shifts. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63193 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-28 08:12:05 +00:00
Dan Gohman
e7852d0144 Take the next steps in making SDUse more consistent with LLVM Use, and 
tidy up SDUse and related code.
 - Replace the operator= member functions with a set method, like
   LLVM Use has, and variants setInitial and setNode, which take
   care up updating use lists, like LLVM Use's does. This simplifies
   code that calls these functions.
 - getSDValue() is renamed to get(), as in LLVM Use, though most
   places can either use the implicit conversion to SDValue or the
   convenience functions instead.
 - Fix some more node vs. value terminology issues.

Also, eliminate the one remaining use of SDOperandPtr, and
SDOperandPtr itself.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62995 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-26 04:35:06 +00:00
Nate Begeman
c2fd67f697 De-identifying per sabre review 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62988 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-26 03:15:31 +00:00
Nate Begeman
740ab03f12 Support pattern matching various x86 sse shifts. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62979 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-26 00:52:55 +00:00
Bob Wilson
4c24546238 Add SelectionDAG::getNOT method to construct bitwise NOT operations, 
corresponding to the "not" and "vnot" PatFrags.  Use the new method
in some places where it seems appropriate.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62768 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-22 17:39:32 +00:00
Evan Cheng
50c3dfefd9 Minor tweak to LowerUINT_TO_FP_i32. Bias (after scalar_to_vector) has two uses so we should make it the second source operand of ISD::OR so 2-address pass won't have to be smart about commuting. 
%reg1024<def> = MOVSDrm %reg0, 1, %reg0, <cp#0>, Mem:LD(8,8) [ConstantPool + 0]
%reg1025<def> = MOVSD2PDrr %reg1024
%reg1026<def> = MOVDI2PDIrm <fi#-1>, 1, %reg0, 0, Mem:LD(4,16) [FixedStack-1 + 0]
%reg1027<def> = ORPSrr %reg1025<kill>, %reg1026<kill>
%reg1028<def> = MOVPD2SDrr %reg1027<kill>
%reg1029<def> = SUBSDrr %reg1028<kill>, %reg1024<kill>
%reg1030<def> = CVTSD2SSrr %reg1029<kill>
MOVSSmr <fi#0>, 1, %reg0, 0, %reg1030<kill>, Mem:ST(4,4) [FixedStack0 + 0]
%reg1031<def> = LD_Fp32m80 <fi#0>, 1, %reg0, 0, Mem:LD(4,16) [FixedStack0 + 0]
RET %reg1031<kill>, %ST0<imp-use,kill>

The reason 2-addr pass isn't smart enough to commute the ORPSrr is because it can't look pass the MOVSD2PDrr instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62505 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-19 08:19:57 +00:00
Evan Cheng
a06ec9efe1 Now not UINT_TO_FP is legal (it's marked custom), dag combiner won't 
optimize it to a SINT_TO_FP when the sign bit is known zero. X86 isel should perform the optimization itself.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62504 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-19 08:08:22 +00:00
Bill Wendling
030939c87b Extend thi 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62415 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-17 07:40:19 +00:00
Bill Wendling
f6a4e2edb0 Temporarily revert my last change. It is causing a bootstrap failure. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62405 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-17 04:23:51 +00:00
Bill Wendling
8b8a636843 Implement a special algorithm for converting uint_to_fp for i32 values on 
X86. This code:

void f() {
  uint32_t x;
  float y = (float)x;
}

used to be:

     movl     %eax, -8(%ebp)
     movl     [2^52 double], -4(%ebp)
     movsd    -8(%ebp), %xmm0
     subsd    [2^52 double], %xmm0
     cvtsd2ss %xmm0, %xmm0

Is now:

   movsd        [2^52 double], %xmm0
   movsd        %xmm0, %xmm1
   movd         %ecx, %xmm2
   orps         %xmm2, %xmm1
   subsd        %xmm0, %xmm1
   cvtsd2ss     %xmm1, %xmm0

This is faster on X86. Note that there's an extra load of %xmm0 into %xmm1. That
will be fixed in a later coalescer fix.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62404 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-17 03:56:04 +00:00
Bill Wendling
64e87326d9 Add support for non-zero __builtin_return_address values on X86. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62338 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-16 19:25:27 +00:00
Mon P Wang
f0fcdd8e26 Expand insert/extract of a <4 x i32> with a variable index. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62281 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-15 21:10:20 +00:00
Dan Gohman
c13cf130c4 Make getWidenVectorType const. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62265 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-15 17:34:08 +00:00
Dan Gohman
0746392cc2 BT appears to be available on all >= i386 chips. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62196 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-13 23:27:15 +00:00
Dan Gohman
286575c65c Don't use a BT instruction if the AND has multiple uses. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62195 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-13 23:25:30 +00:00
Devang Patel
83489bb770 Use DebugInfo interface to lower dbg_* intrinsics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62127 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-13 00:35:13 +00:00
Dan Gohman
653456c351 X86_COND_C and X86_COND_NC are alternate mnemonics for 
X86_COND_B and X86_COND_AE, respectively.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61835 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-07 00:15:08 +00:00