This patch adds support for AArch64 (ARM's 64-bit architecture) to
LLVM in the "experimental" category. Currently, it won't be built
unless requested explicitly.
This initial commit should have support for:
+ Assembly of all scalar (i.e. non-NEON, non-Crypto) instructions
(except the late addition CRC instructions).
+ CodeGen features required for C++03 and C99.
+ Compilation for the "small" memory model: code+static data <
4GB.
+ Absolute and position-independent code.
+ GNU-style (i.e. "__thread") TLS.
+ Debugging information.
The principal omission, currently, is performance tuning.
This patch excludes the NEON support also reviewed due to an outbreak of
batshit insanity in our legal department. That will be committed soon bringing
the changes to precisely what has been approved.
Further reviews would be gratefully received.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174054 91177308-0d34-0410-b5e6-96231b3b80d8
it isn't really an AliasAnalysis concept, and ValueTracking has similar things
that it could plausibly share code with some day.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174027 91177308-0d34-0410-b5e6-96231b3b80d8
The Attribute::hasAttributes() is kind of meaningless since an Attribute can
have only one attribute. And we would rather people use the 'operator=='
instead of Attribute::hasAttribute().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174026 91177308-0d34-0410-b5e6-96231b3b80d8
reference to a pointer, so that it can handle the case where DataLayout
is not available and behave conservatively.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174024 91177308-0d34-0410-b5e6-96231b3b80d8
Makefile.config does not have the value for ENABLE_THREADS substituted as the
variable is called LLVM_ENABLE_THREADS within configure.ac. This was pointed
out by zygoloid over IRC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174021 91177308-0d34-0410-b5e6-96231b3b80d8
--- Reverse-merging r174010 into '.':
U include/llvm/IR/Attributes.h
U lib/IR/Verifier.cpp
U lib/IR/Attributes.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174012 91177308-0d34-0410-b5e6-96231b3b80d8
The AttrBuilder is there to build up multiple attributes. The Attribute class
represents only one attribute at a time. So remove this unnecessary builder
creator method.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174010 91177308-0d34-0410-b5e6-96231b3b80d8
register for inline asm. This conforms to how gcc allows for effective
casting of inputs into gprs (fprs is already handled).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174008 91177308-0d34-0410-b5e6-96231b3b80d8
Several places were still treating the Attribute object as respresenting
multiple attributes. Those places now use the AttributeSet to represent
multiple attributes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174003 91177308-0d34-0410-b5e6-96231b3b80d8
for example, a one-past-the-end pointer from one global variable may
be equal to the base pointer of another global variable.
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As a bonus I put in some extra checks to make sure that we are identifying the
machine word of various Mac OS X/iOS targets appropriately.
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There are still places which treat the Attribute object as a collection of
attributes. I'm systematically removing them.
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What I thought was going to be a quick thing has extended out a little bit in
time *sigh*. So after some thought in order to not cruft up the tree I am
removing this for now since it is the right thing to do.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173985 91177308-0d34-0410-b5e6-96231b3b80d8
prevent an llvm developer from mistakenly thinking that just because the
intrinsic has volatile flags that volatile operations can be converted
to or folded into them.
Platforms may rely on volatile loads and stores of natively supported
data width to be executed as single instruction. When compiling
C, this expectation likely holds for l-values of volatile primitive
types with native hardware support, but not necessarily for aggregate
types. The frontend upholds these expectations, which are not
specified in the IR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173974 91177308-0d34-0410-b5e6-96231b3b80d8
This is the first commit of a large series which will add support for the
QPX vector instruction set to the PowerPC backend. This instruction set is
used on the IBM Blue Gene/Q supercomputers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173973 91177308-0d34-0410-b5e6-96231b3b80d8
