Suyog Sarda
|
e190f77f91
|
Addition to r216371 (SLP and Loop Vectorization) and r218607 where
cost model for signed division by power of 2 was improved for AArch64.
The revision r218607 missed test case for Loop Vectorization.
Adding it in this revision.
Differential Revision: http://reviews.llvm.org/D6181
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221674 91177308-0d34-0410-b5e6-96231b3b80d8
|
2014-11-11 07:39:27 +00:00 |
|