6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-01-25 00:33:15 +00:00
Code Issues Projects Releases Wiki Activity
69,344 Commits 39 Branches 0 Tags
Commit Graph

3278 Commits

Author SHA1 Message Date
Chris Lattner
7fd4489de1 emit the mnemonic aliases in their own helper function instead of 
inline into MatchInstructionImpl.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117826 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-30 18:48:18 +00:00
Chris Lattner
674c1dcca2 implement (and document!) the first kind of MC assembler alias, which 
just remaps one mnemonic to another.  Convert a few of the X86 aliases
from .cpp to .td code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117815 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-30 17:36:36 +00:00
Dan Gohman
e836e5f174 Apply a patch from Frits van Bommel to fix the CMake build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117731 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-29 22:36:50 +00:00
Jim Grosbach
a7c78220c4 trailing whitespace 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117724 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-29 22:13:48 +00:00
Dan Gohman
9dbb79aaac not is testing for a normal exit with a non-zero value. It shouldn't 
return success if the child process is killed with a signal.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117701 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-29 20:20:29 +00:00
Chris Lattner
4e692ab5ee fix the asmmatcher generator to handle targets with no RegisterPrefix 
(like ARM) correctly.  With this change, we can now match "bx lr"
because we recognize lr as a register.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117606 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-28 21:28:42 +00:00
Evan Cheng
f40deed62f Shifter ops are not always free. Do not fold them (especially to form 
complex load / store addressing mode) when they have higher cost and
when they have more than one use.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117509 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 23:41:30 +00:00
Owen Anderson
498ec20703 Provide correct encodings for NEON vcvt, which has its own special immediate encoding 
for specifying fractional bits for fixed point conversions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117501 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 22:49:00 +00:00
Kevin Enderby
529b1a4398 Added the x86 instruction ud2b (2nd official undefined instruction). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117485 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 20:46:49 +00:00
Dan Gohman
f99f1197c7 Enable clang autocompletion by default. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117415 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-26 23:24:54 +00:00
Jim Grosbach
3e55612472 First part of refactoring ARM addrmode2 (load/store) instructions to be more 
explicit about the operands. Split out the different variants into separate
instructions. This gives us the ability to, among other things, assign
different scheduling itineraries to the variants. rdar://8477752.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117409 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-26 22:37:02 +00:00
Benjamin Kramer
86c69c570c Constify another 2 disassembler tables. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117208 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-23 09:28:42 +00:00
Benjamin Kramer
4d1dca92bd Make the disassembler tables const so they end up in read-only memory. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117206 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-23 09:10:44 +00:00
Mikhail Glushenkov
a73e586495 Remove -llvmc-temp-hack from tblgen. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117197 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-23 07:32:53 +00:00
Mikhail Glushenkov
17ef94fe1b Syntax tweak in llvmc: (something [a,b,c]) -> (something a, b, c). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117196 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-23 07:32:46 +00:00
Mikhail Glushenkov
c761f7dca2 Trailing whitespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117195 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-23 07:32:37 +00:00
Bob Wilson
04b2bb30f6 Do not install libBugpointPasses.dylib for Apple builds. Radar 8585383. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117172 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-22 23:04:17 +00:00
Bob Wilson
abf4b382a6 Fix the name of libLLVMHello.dylib so that it does not get installed for 
Apple builds.  Radar 8585383.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117164 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-22 22:10:57 +00:00
Benjamin Kramer
a3ac427507 Make some symbols static, move classes into anonymous namespaces. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117111 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-22 17:35:07 +00:00
Anders Carlsson
238777eb58 Add a way to emit StringSwitch of clang attribute spellings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116899 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-20 01:21:53 +00:00
Michael J. Spencer
01734b1e1b Fix VC2010 build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116833 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-19 18:04:06 +00:00
Oscar Fuentes
f0c55a9b97 Build with RTTI and exceptions disabled. Only in GCC for now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116682 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-17 02:26:16 +00:00
Michael J. Spencer
b269ff7267 KillTheDoctor: Fix 2008 build. I'm actually surprised 2010 defines all of these, many are non-standard posix/unix extensions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116597 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-15 18:13:02 +00:00
Jakob Stoklund Olesen
824c10ece2 Teach FileCheck to handle trailing CHECK-NOT patterns. 
A CHECK-NOT pattern without a following CHECK pattern simply checks that the
pattern doesn't match before the end of the input file.

You can even have only CHECK-NOT patterns to check that strings appear nowhere
in the input file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116592 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-15 17:47:12 +00:00
Jim Grosbach
8abe32af38 ARM mode encoding information for UBFX and SBFX instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116588 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-15 17:15:16 +00:00
Jim Grosbach
41045ba731 Teach PerfectShuffle to not generate files with embedded tab characters. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116458 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-14 00:12:49 +00:00
Jim Grosbach
b3af5de2d9 Refactor the ARM 'setend' instruction pattern. Use a single instruction pattern 
and handle the operand explicitly. Flesh out encoding information. Add an
explicit disassembler testcase for the instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116432 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-13 21:00:04 +00:00
Jim Grosbach
b35ad41fef Add ARM mode encoding for [SU]XT[BH] and [SU]XTA[BH] instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116421 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-13 19:56:10 +00:00
Jim Grosbach
5013f7469e Allow targets to optionally specify custom binary encoder functions for 
operand values. This is useful for operands which require additional trickery
to encode into the instruction. For example, the ARM shifted immediate and
shifted register operands.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116353 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-12 22:21:57 +00:00
Michael J. Spencer
09203ac3dd KillTheDoctor: Fix VS2008 build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116330 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-12 19:27:44 +00:00
Cameron Esfahani
519c893c26 Fix spelling error. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116282 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-12 00:21:05 +00:00
Jim Grosbach
a1e2194f03 The assert() should reference to machine instr operand number, too. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116243 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-11 21:41:31 +00:00
Jim Grosbach
1a7233f9d0 Make sure to use the machine instruction operand number. It doesn't always 
map one-to-one with the CodeGenInstruction operand number.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116238 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-11 21:31:22 +00:00
Michael J. Spencer
bbb9ea7b70 Add KillTheDoctor. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116216 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-11 19:55:38 +00:00
Jim Grosbach
c4bd6fbf4b trailing whitespace cleanup 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116215 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-11 19:38:01 +00:00
Jim Grosbach
01855071e2 When figuring out which operands match which encoding fields in an instruction, 
try to match them by name first. If there is no by-name match, fall back to
assuming they are in order (this was the previous behavior).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116211 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-11 18:25:51 +00:00
Chris Lattner
60cb528246 Per discussion with Sanjiv, remove the PIC16 target from mainline. When/if 
it comes back, it will be largely a rewrite, so keeping the old codebase
in tree isn't helping anyone.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116190 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-11 05:44:40 +00:00
Michael J. Spencer
46d48a3f3a syntax-highlighting: Fix module asm keyword. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116152 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-09 15:44:36 +00:00
Michael J. Spencer
9a89b0115f Add Kate syntax highlighting files. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116146 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-09 07:11:04 +00:00
Jim Grosbach
bb16824dc3 A few 80 column cleanups 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116069 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-08 18:13:57 +00:00
Jim Grosbach
9ed2cee105 trailing whitespace 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116068 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-08 18:09:59 +00:00
Daniel Dunbar
6aa526bf76 Fix -Asserts warning. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116030 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-08 02:07:22 +00:00
Jim Grosbach
bade37bb8b Make <target>CodeEmitter::getBinaryCodeForInstr() a const method. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116018 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-08 00:21:28 +00:00
Jim Grosbach
0e99219e03 Move checking for t2MOVCCi16 to the right place. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115994 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-07 22:14:01 +00:00
Nick Lewycky
366b1e1f3f Fix typo in comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115986 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-07 21:55:16 +00:00
Dan Gohman
e4f1a9b8a2 Move tool_output_file into its own file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115973 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-07 20:32:40 +00:00
Michael J. Spencer
6b17830980 gtest: Fix warnings on MinGW. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115945 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-07 18:29:44 +00:00
Michael J. Spencer
1cade330af CMake: Fix warning in gtest. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115935 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-07 18:12:54 +00:00
Jim Grosbach
8b892ae3d6 trailing whitespace 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115923 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-07 16:56:28 +00:00
Jim Grosbach
a4257162be Allow use of the 16-bit literal move instruction in CMOVs for Thumb2 mode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115890 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-07 00:53:56 +00:00